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Commit f63eb7c4 authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Daniel Vetter
Browse files

drm/i915: set the DDI sync polarity bits 



During my tests, everything worked even if the wrong polarity was set.
Still, we should try to set the correct values.

Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 3f7c447f

drivers/gpu/drm/i915/i915_reg.h

+2 −0
Original line number Diff line number Diff line
@@ -4312,6 +4312,8 @@ 
#define  PIPE_DDI_BPC_10				(1<<20)

#define  PIPE_DDI_BPC_6					(2<<20)

#define  PIPE_DDI_BPC_12				(3<<20)

#define  PIPE_DDI_PVSYNC			(1<<17)

#define  PIPE_DDI_PHSYNC			(1<<16)

#define  PIPE_DDI_BFI_ENABLE			(1<<4)

#define  PIPE_DDI_PORT_WIDTH_X1			(0<<1)

#define  PIPE_DDI_PORT_WIDTH_X2			(1<<1)

drivers/gpu/drm/i915/intel_ddi.c

+6 −0
Original line number Diff line number Diff line
@@ -727,6 +727,7 @@ void intel_ddi_mode_set(struct drm_encoder *encoder, 
	temp &= ~PIPE_DDI_PORT_MASK;

	temp &= ~PIPE_DDI_BPC_12;

	temp &= ~PIPE_DDI_MODE_SELECT_MASK;

	temp &= ~(PIPE_DDI_PVSYNC | PIPE_DDI_PHSYNC);

	temp |= PIPE_DDI_SELECT_PORT(port) |

			((intel_crtc->bpp > 24) ?

				PIPE_DDI_BPC_12 :
@@ -738,6 +739,11 @@ void intel_ddi_mode_set(struct drm_encoder *encoder, 
	else

		temp |= PIPE_DDI_MODE_SELECT_DVI;



	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)

		temp |= PIPE_DDI_PVSYNC;

	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)

		temp |= PIPE_DDI_PHSYNC;



	I915_WRITE(DDI_FUNC_CTL(pipe), temp);



	intel_hdmi->set_infoframes(encoder, adjusted_mode);