Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f606193a authored by Chris Zhong's avatar Chris Zhong Committed by Heiko Stuebner
Browse files

arm64: dts: rockchip: add Type-C phy for RK3399 



There are 2 Type-C phy on RK3399, they are almost same, except the
address of register. They support USB3.0 Type-C and DisplayPort1.3
Alt Mode on USB Type-C. Register a phy, supply it to USB3 controller
and DP controller.

Signed-off-by: default avatarChris Zhong <zyw@rock-chips.com>
Reviewed-by: default avatarGuenter Roeck <linux@roeck-us.net>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 0714bc77

arch/arm64/boot/dts/rockchip/rk3399.dtsi

+56 −0
Original line number Diff line number Diff line
@@ -1140,6 +1140,62 @@ 
		};

	};



	tcphy0: phy@ff7c0000 {

		compatible = "rockchip,rk3399-typec-phy";

		reg = <0x0 0xff7c0000 0x0 0x40000>;

		clocks = <&cru SCLK_UPHY0_TCPDCORE>,

			 <&cru SCLK_UPHY0_TCPDPHY_REF>;

		clock-names = "tcpdcore", "tcpdphy-ref";

		assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>;

		assigned-clock-rates = <50000000>;

		resets = <&cru SRST_UPHY0>,

			 <&cru SRST_UPHY0_PIPE_L00>,

			 <&cru SRST_P_UPHY0_TCPHY>;

		reset-names = "uphy", "uphy-pipe", "uphy-tcphy";

		rockchip,grf = <&grf>;

		rockchip,typec-conn-dir = <0xe580 0 16>;

		rockchip,usb3tousb2-en = <0xe580 3 19>;

		rockchip,external-psm = <0xe588 14 30>;

		rockchip,pipe-status = <0xe5c0 0 0>;

		status = "disabled";



		tcphy0_dp: dp-port {

			#phy-cells = <0>;

		};



		tcphy0_usb3: usb3-port {

			#phy-cells = <0>;

		};

	};



	tcphy1: phy@ff800000 {

		compatible = "rockchip,rk3399-typec-phy";

		reg = <0x0 0xff800000 0x0 0x40000>;

		clocks = <&cru SCLK_UPHY1_TCPDCORE>,

			 <&cru SCLK_UPHY1_TCPDPHY_REF>;

		clock-names = "tcpdcore", "tcpdphy-ref";

		assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>;

		assigned-clock-rates = <50000000>;

		resets = <&cru SRST_UPHY1>,

			 <&cru SRST_UPHY1_PIPE_L00>,

			 <&cru SRST_P_UPHY1_TCPHY>;

		reset-names = "uphy", "uphy-pipe", "uphy-tcphy";

		rockchip,grf = <&grf>;

		rockchip,typec-conn-dir = <0xe58c 0 16>;

		rockchip,usb3tousb2-en = <0xe58c 3 19>;

		rockchip,external-psm = <0xe594 14 30>;

		rockchip,pipe-status = <0xe5c0 16 16>;

		status = "disabled";



		tcphy1_dp: dp-port {

			#phy-cells = <0>;

		};



		tcphy1_usb3: usb3-port {

			#phy-cells = <0>;

		};

	};



	watchdog@ff848000 {

		compatible = "snps,dw-wdt";

		reg = <0x0 0xff848000 0x0 0x100>;