Loading drivers/gpu/drm/nouveau/dispnv04/hw.c +4 −5 Original line number Diff line number Diff line Loading @@ -662,7 +662,6 @@ nv_load_state_ext(struct drm_device *dev, int head, struct nouveau_drm *drm = nouveau_drm(dev); struct nvif_device *device = &drm->device; struct nouveau_timer *ptimer = nvkm_timer(device); struct nouveau_fb *pfb = nvkm_fb(device); struct nv04_crtc_reg *regp = &state->crtc_reg[head]; uint32_t reg900; int i; Loading @@ -679,10 +678,10 @@ nv_load_state_ext(struct drm_device *dev, int head, nvif_wr32(device, NV_PVIDEO_INTR_EN, 0); nvif_wr32(device, NV_PVIDEO_OFFSET_BUFF(0), 0); nvif_wr32(device, NV_PVIDEO_OFFSET_BUFF(1), 0); nvif_wr32(device, NV_PVIDEO_LIMIT(0), pfb->ram->size - 1); nvif_wr32(device, NV_PVIDEO_LIMIT(1), pfb->ram->size - 1); nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(0), pfb->ram->size - 1); nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(1), pfb->ram->size - 1); nvif_wr32(device, NV_PVIDEO_LIMIT(0), device->info.ram_size - 1); nvif_wr32(device, NV_PVIDEO_LIMIT(1), device->info.ram_size - 1); nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(0), device->info.ram_size - 1); nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(1), device->info.ram_size - 1); nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0); NVWriteCRTC(dev, head, NV_PCRTC_CURSOR_CONFIG, regp->cursor_cfg); Loading drivers/gpu/drm/nouveau/nouveau_abi16.c +0 −4 Original line number Diff line number Diff line Loading @@ -240,8 +240,6 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS) struct nouveau_abi16 *abi16 = nouveau_abi16_get(file_priv, dev); struct nouveau_abi16_chan *chan; struct nvif_device *device; struct nouveau_instmem *imem; struct nouveau_fb *pfb; int ret; if (unlikely(!abi16)) Loading @@ -251,8 +249,6 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS) return nouveau_abi16_put(abi16, -ENODEV); device = &abi16->device; imem = nvkm_instmem(device); pfb = nvkm_fb(device); /* hack to allow channel engine type specification on kepler */ if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { Loading drivers/gpu/drm/nouveau/nouveau_bo.c +1 −2 Original line number Diff line number Diff line Loading @@ -257,8 +257,7 @@ static void set_placement_range(struct nouveau_bo *nvbo, uint32_t type) { struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev); struct nouveau_fb *pfb = nvkm_fb(&drm->device); u32 vram_pages = pfb->ram->size >> PAGE_SHIFT; u32 vram_pages = drm->device.info.ram_size >> PAGE_SHIFT; if (drm->device.info.family == NV_DEVICE_INFO_V0_CELSIUS && nvbo->tile_mode && (type & TTM_PL_FLAG_VRAM) && Loading drivers/gpu/drm/nouveau/nouveau_chan.c +3 −8 Original line number Diff line number Diff line Loading @@ -88,9 +88,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, u32 handle, u32 size, struct nouveau_channel **pchan) { struct nouveau_cli *cli = (void *)nvif_client(&device->base); struct nouveau_instmem *imem = nvkm_instmem(device); struct nouveau_vmmgr *vmm = nvkm_vmmgr(device); struct nouveau_fb *pfb = nvkm_fb(device); struct nv_dma_v0 args = {}; struct nouveau_channel *chan; u32 target; Loading Loading @@ -141,7 +139,6 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, args.limit = cli->vm->vmm->limit - 1; } else if (chan->push.buffer->bo.mem.mem_type == TTM_PL_VRAM) { u64 limit = pfb->ram->size - imem->reserved - 1; if (device->info.family == NV_DEVICE_INFO_V0_TNT) { /* nv04 vram pushbuf hack, retarget to its location in * the framebuffer bar rather than direct vram access.. Loading @@ -150,12 +147,12 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, args.target = NV_DMA_V0_TARGET_PCI; args.access = NV_DMA_V0_ACCESS_RDWR; args.start = nv_device_resource_start(nvkm_device(device), 1); args.limit = args.start + limit; args.limit = args.start + device->info.ram_user - 1; } else { args.target = NV_DMA_V0_TARGET_VRAM; args.access = NV_DMA_V0_ACCESS_RDWR; args.start = 0; args.limit = limit; args.limit = device->info.ram_user - 1; } } else { if (chan->drm->agp.stat == ENABLED) { Loading Loading @@ -284,9 +281,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) { struct nvif_device *device = chan->device; struct nouveau_cli *cli = (void *)nvif_client(&device->base); struct nouveau_instmem *imem = nvkm_instmem(device); struct nouveau_vmmgr *vmm = nvkm_vmmgr(device); struct nouveau_fb *pfb = nvkm_fb(device); struct nouveau_software_chan *swch; struct nv_dma_v0 args = {}; int ret, i; Loading @@ -304,7 +299,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) args.target = NV_DMA_V0_TARGET_VRAM; args.access = NV_DMA_V0_ACCESS_RDWR; args.start = 0; args.limit = pfb->ram->size - imem->reserved - 1; args.limit = device->info.ram_user - 1; } ret = nvif_object_init(chan->object, NULL, vram, Loading drivers/gpu/drm/nouveau/nouveau_fbcon.c +2 −3 Original line number Diff line number Diff line Loading @@ -491,7 +491,6 @@ int nouveau_fbcon_init(struct drm_device *dev) { struct nouveau_drm *drm = nouveau_drm(dev); struct nouveau_fb *pfb = nvkm_fb(&drm->device); struct nouveau_fbdev *fbcon; int preferred_bpp; int ret; Loading @@ -518,10 +517,10 @@ nouveau_fbcon_init(struct drm_device *dev) drm_fb_helper_single_add_all_connectors(&fbcon->helper); if (pfb->ram->size <= 32 * 1024 * 1024) if (drm->device.info.ram_size <= 32 * 1024 * 1024) preferred_bpp = 8; else if (pfb->ram->size <= 64 * 1024 * 1024) if (drm->device.info.ram_size <= 64 * 1024 * 1024) preferred_bpp = 16; else preferred_bpp = 32; Loading Loading
drivers/gpu/drm/nouveau/dispnv04/hw.c +4 −5 Original line number Diff line number Diff line Loading @@ -662,7 +662,6 @@ nv_load_state_ext(struct drm_device *dev, int head, struct nouveau_drm *drm = nouveau_drm(dev); struct nvif_device *device = &drm->device; struct nouveau_timer *ptimer = nvkm_timer(device); struct nouveau_fb *pfb = nvkm_fb(device); struct nv04_crtc_reg *regp = &state->crtc_reg[head]; uint32_t reg900; int i; Loading @@ -679,10 +678,10 @@ nv_load_state_ext(struct drm_device *dev, int head, nvif_wr32(device, NV_PVIDEO_INTR_EN, 0); nvif_wr32(device, NV_PVIDEO_OFFSET_BUFF(0), 0); nvif_wr32(device, NV_PVIDEO_OFFSET_BUFF(1), 0); nvif_wr32(device, NV_PVIDEO_LIMIT(0), pfb->ram->size - 1); nvif_wr32(device, NV_PVIDEO_LIMIT(1), pfb->ram->size - 1); nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(0), pfb->ram->size - 1); nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(1), pfb->ram->size - 1); nvif_wr32(device, NV_PVIDEO_LIMIT(0), device->info.ram_size - 1); nvif_wr32(device, NV_PVIDEO_LIMIT(1), device->info.ram_size - 1); nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(0), device->info.ram_size - 1); nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(1), device->info.ram_size - 1); nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0); NVWriteCRTC(dev, head, NV_PCRTC_CURSOR_CONFIG, regp->cursor_cfg); Loading
drivers/gpu/drm/nouveau/nouveau_abi16.c +0 −4 Original line number Diff line number Diff line Loading @@ -240,8 +240,6 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS) struct nouveau_abi16 *abi16 = nouveau_abi16_get(file_priv, dev); struct nouveau_abi16_chan *chan; struct nvif_device *device; struct nouveau_instmem *imem; struct nouveau_fb *pfb; int ret; if (unlikely(!abi16)) Loading @@ -251,8 +249,6 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS) return nouveau_abi16_put(abi16, -ENODEV); device = &abi16->device; imem = nvkm_instmem(device); pfb = nvkm_fb(device); /* hack to allow channel engine type specification on kepler */ if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { Loading
drivers/gpu/drm/nouveau/nouveau_bo.c +1 −2 Original line number Diff line number Diff line Loading @@ -257,8 +257,7 @@ static void set_placement_range(struct nouveau_bo *nvbo, uint32_t type) { struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev); struct nouveau_fb *pfb = nvkm_fb(&drm->device); u32 vram_pages = pfb->ram->size >> PAGE_SHIFT; u32 vram_pages = drm->device.info.ram_size >> PAGE_SHIFT; if (drm->device.info.family == NV_DEVICE_INFO_V0_CELSIUS && nvbo->tile_mode && (type & TTM_PL_FLAG_VRAM) && Loading
drivers/gpu/drm/nouveau/nouveau_chan.c +3 −8 Original line number Diff line number Diff line Loading @@ -88,9 +88,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, u32 handle, u32 size, struct nouveau_channel **pchan) { struct nouveau_cli *cli = (void *)nvif_client(&device->base); struct nouveau_instmem *imem = nvkm_instmem(device); struct nouveau_vmmgr *vmm = nvkm_vmmgr(device); struct nouveau_fb *pfb = nvkm_fb(device); struct nv_dma_v0 args = {}; struct nouveau_channel *chan; u32 target; Loading Loading @@ -141,7 +139,6 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, args.limit = cli->vm->vmm->limit - 1; } else if (chan->push.buffer->bo.mem.mem_type == TTM_PL_VRAM) { u64 limit = pfb->ram->size - imem->reserved - 1; if (device->info.family == NV_DEVICE_INFO_V0_TNT) { /* nv04 vram pushbuf hack, retarget to its location in * the framebuffer bar rather than direct vram access.. Loading @@ -150,12 +147,12 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, args.target = NV_DMA_V0_TARGET_PCI; args.access = NV_DMA_V0_ACCESS_RDWR; args.start = nv_device_resource_start(nvkm_device(device), 1); args.limit = args.start + limit; args.limit = args.start + device->info.ram_user - 1; } else { args.target = NV_DMA_V0_TARGET_VRAM; args.access = NV_DMA_V0_ACCESS_RDWR; args.start = 0; args.limit = limit; args.limit = device->info.ram_user - 1; } } else { if (chan->drm->agp.stat == ENABLED) { Loading Loading @@ -284,9 +281,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) { struct nvif_device *device = chan->device; struct nouveau_cli *cli = (void *)nvif_client(&device->base); struct nouveau_instmem *imem = nvkm_instmem(device); struct nouveau_vmmgr *vmm = nvkm_vmmgr(device); struct nouveau_fb *pfb = nvkm_fb(device); struct nouveau_software_chan *swch; struct nv_dma_v0 args = {}; int ret, i; Loading @@ -304,7 +299,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) args.target = NV_DMA_V0_TARGET_VRAM; args.access = NV_DMA_V0_ACCESS_RDWR; args.start = 0; args.limit = pfb->ram->size - imem->reserved - 1; args.limit = device->info.ram_user - 1; } ret = nvif_object_init(chan->object, NULL, vram, Loading
drivers/gpu/drm/nouveau/nouveau_fbcon.c +2 −3 Original line number Diff line number Diff line Loading @@ -491,7 +491,6 @@ int nouveau_fbcon_init(struct drm_device *dev) { struct nouveau_drm *drm = nouveau_drm(dev); struct nouveau_fb *pfb = nvkm_fb(&drm->device); struct nouveau_fbdev *fbcon; int preferred_bpp; int ret; Loading @@ -518,10 +517,10 @@ nouveau_fbcon_init(struct drm_device *dev) drm_fb_helper_single_add_all_connectors(&fbcon->helper); if (pfb->ram->size <= 32 * 1024 * 1024) if (drm->device.info.ram_size <= 32 * 1024 * 1024) preferred_bpp = 8; else if (pfb->ram->size <= 64 * 1024 * 1024) if (drm->device.info.ram_size <= 64 * 1024 * 1024) preferred_bpp = 16; else preferred_bpp = 32; Loading