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Commit f23fe857 authored by Ido Yariv's avatar Ido Yariv Committed by Sekhar Nori
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ARM: davinci: Explicitly set channel controllers' default queues



Davinci platforms may define a default queue for each channel
controller. If one is not defined, the default queue is set to EVENTQ_1.
However, there's no way to distinguish between an unset default queue to
one that is set to EVENTQ_0, as EVENTQ_0 = 0.

Explicitly specify the default queue for all channel controllers on all
Davinci platforms to EVENTQ_1, and don't overwrite it in the EDMA probe
function.

One exception is the DA850 board, for which EVENTQ_1 is not a valid
option for its second channel controller. Use EVENTQ_0 instead for that
channel controller.

Signed-off-by: default avatarIdo Yariv <ido@wizery.com>
Signed-off-by: default avatarSekhar Nori <nsekhar@ti.com>
parent b6fd41e2
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+3 −0
Original line number Diff line number Diff line
@@ -136,6 +136,7 @@ static struct edma_soc_info da830_edma_cc0_info = {
	.n_cc			= 1,
	.queue_tc_mapping	= da8xx_queue_tc_mapping,
	.queue_priority_mapping	= da8xx_queue_priority_mapping,
	.default_queue		= EVENTQ_1,
};

static struct edma_soc_info *da830_edma_info[EDMA_MAX_CC] = {
@@ -151,6 +152,7 @@ static struct edma_soc_info da850_edma_cc_info[] = {
		.n_cc			= 1,
		.queue_tc_mapping	= da8xx_queue_tc_mapping,
		.queue_priority_mapping	= da8xx_queue_priority_mapping,
		.default_queue		= EVENTQ_1,
	},
	{
		.n_channel		= 32,
@@ -160,6 +162,7 @@ static struct edma_soc_info da850_edma_cc_info[] = {
		.n_cc			= 1,
		.queue_tc_mapping	= da850_queue_tc_mapping,
		.queue_priority_mapping	= da850_queue_priority_mapping,
		.default_queue		= EVENTQ_0,
	},
};

+1 −0
Original line number Diff line number Diff line
@@ -80,6 +80,7 @@ static struct edma_soc_info edma_cc0_info = {
	.n_cc			= 1,
	.queue_tc_mapping	= edma_tc_mapping,
	.queue_priority_mapping	= edma_priority_mapping,
	.default_queue		= EVENTQ_1,
};

static struct edma_soc_info *tnetv107x_edma_info[EDMA_MAX_CC] = {
+1 −0
Original line number Diff line number Diff line
@@ -591,6 +591,7 @@ static struct edma_soc_info edma_cc0_info = {
	.n_cc			= 1,
	.queue_tc_mapping	= queue_tc_mapping,
	.queue_priority_mapping	= queue_priority_mapping,
	.default_queue		= EVENTQ_1,
};

static struct edma_soc_info *dm355_edma_info[EDMA_MAX_CC] = {
+1 −0
Original line number Diff line number Diff line
@@ -514,6 +514,7 @@ static struct edma_soc_info edma_cc0_info = {
	.n_cc			= 1,
	.queue_tc_mapping	= queue_tc_mapping,
	.queue_priority_mapping	= queue_priority_mapping,
	.default_queue		= EVENTQ_1,
};

static struct edma_soc_info *dm644x_edma_info[EDMA_MAX_CC] = {
+1 −0
Original line number Diff line number Diff line
@@ -555,6 +555,7 @@ static struct edma_soc_info edma_cc0_info = {
	.n_cc			= 1,
	.queue_tc_mapping	= dm646x_queue_tc_mapping,
	.queue_priority_mapping	= dm646x_queue_priority_mapping,
	.default_queue		= EVENTQ_1,
};

static struct edma_soc_info *dm646x_edma_info[EDMA_MAX_CC] = {
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