Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f0b9f5cb authored by Tomas Winkler's avatar Tomas Winkler Committed by John W. Linville
Browse files

iwlwifi: fix 64bit platform firmware loading



This patch fixes loading firmware from memory above 32bit.

Signed-off-by: default avatarTomas Winkler <tomas.winkler@intel.com>
Signed-off-by: default avatarEmmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: default avatarZhu Yi <yi.zhu@intel.com>
Acked-by: default avatarMarcel Holtmann <holtmann@linux.intel.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 1d3e6c61
Loading
Loading
Loading
Loading
+4 −7
Original line number Diff line number Diff line
@@ -578,14 +578,11 @@ static int iwl5000_load_section(struct iwl_priv *priv,
		FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),
		phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);

	/* FIME: write the MSB of the phy_addr in CTRL1
	 * iwl_write_direct32(priv,
		IWL_FH_TFDIB_CTRL1_REG(IWL_FH_SRVC_CHNL),
		((phy_addr & MSB_MSK)
			<< FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_count);
	 */
	iwl_write_direct32(priv,
		FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL), byte_cnt);
		FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),
		(iwl_get_dma_hi_address(phy_addr)
			<< FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);

	iwl_write_direct32(priv,
		FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),
		1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
+1 −0
Original line number Diff line number Diff line
@@ -287,6 +287,7 @@

#define FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE	(0x01000000)

#define FH_MEM_TFDIB_REG1_ADDR_BITSHIFT	28

/**
 * Transmit DMA Channel Control/Status Registers (TCSR)