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Commit ef923214 authored by Paul Mackerras's avatar Paul Mackerras Committed by Ingo Molnar
Browse files

perf_counter: powerpc: use u64 for event codes internally 



Although the perf_counter API allows 63-bit raw event codes,
internally in the powerpc back-end we had been using 32-bit
event codes.  This expands them to 64 bits so that we can add
bits for specifying threshold start/stop events and instruction
sampling modes later.

This also corrects the return value of can_go_on_limited_pmc;
we were returning an event code rather than just a 0/1 value in
some circumstances. That didn't particularly matter while event
codes were 32-bit, but now that event codes are 64-bit it
might, so this fixes it.

[ Impact: extend PowerPC perfcounter interfaces from u32 to u64 ]

Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
Acked-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Corey Ashford <cjashfor@linux.vnet.ibm.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
LKML-Reference: <18955.36874.472452.353104@drongo.ozlabs.ibm.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 2e569d36

arch/powerpc/include/asm/perf_counter.h

+5 −5
Original line number Diff line number Diff line
@@ -23,13 +23,13 @@ struct power_pmu { 
	int	max_alternatives;

	u64	add_fields;

	u64	test_adder;

	int	(*compute_mmcr)(unsigned int events[], int n_ev,

	int	(*compute_mmcr)(u64 events[], int n_ev,

				unsigned int hwc[], u64 mmcr[]);

	int	(*get_constraint)(unsigned int event, u64 *mskp, u64 *valp);

	int	(*get_alternatives)(unsigned int event, unsigned int flags,

				    unsigned int alt[]);

	int	(*get_constraint)(u64 event, u64 *mskp, u64 *valp);

	int	(*get_alternatives)(u64 event, unsigned int flags,

				    u64 alt[]);

	void	(*disable_pmc)(unsigned int pmc, u64 mmcr[]);

	int	(*limited_pmc_event)(unsigned int event);

	int	(*limited_pmc_event)(u64 event);

	int	limited_pmc5_6;	/* PMC5 and PMC6 have limited function */

	int	n_generic;

	int	*generic_events;

arch/powerpc/kernel/perf_counter.c

+12 −14
Original line number Diff line number Diff line
@@ -26,7 +26,7 @@ struct cpu_hw_counters { 
	int n_limited;

	u8  pmcs_enabled;

	struct perf_counter *counter[MAX_HWCOUNTERS];

	unsigned int events[MAX_HWCOUNTERS];

	u64 events[MAX_HWCOUNTERS];

	unsigned int flags[MAX_HWCOUNTERS];

	u64 mmcr[3];

	struct perf_counter *limited_counter[MAX_LIMITED_HWCOUNTERS];
@@ -131,11 +131,11 @@ static void write_pmc(int idx, unsigned long val) 
 * and see if any combination of alternative codes is feasible.

 * The feasible set is returned in event[].

 */

static int power_check_constraints(unsigned int event[], unsigned int cflags[],

static int power_check_constraints(u64 event[], unsigned int cflags[],

				   int n_ev)

{

	u64 mask, value, nv;

	unsigned int alternatives[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES];

	u64 alternatives[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES];

	u64 amasks[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES];

	u64 avalues[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES];

	u64 smasks[MAX_HWCOUNTERS], svalues[MAX_HWCOUNTERS];
@@ -564,7 +564,7 @@ void hw_perf_enable(void) 
}



static int collect_events(struct perf_counter *group, int max_count,

			  struct perf_counter *ctrs[], unsigned int *events,

			  struct perf_counter *ctrs[], u64 *events,

			  unsigned int *flags)

{

	int n = 0;
@@ -752,11 +752,11 @@ struct pmu power_pmu = { 
 * that a limited PMC can count, doesn't require interrupts, and

 * doesn't exclude any processor mode.

 */

static int can_go_on_limited_pmc(struct perf_counter *counter, unsigned int ev,

static int can_go_on_limited_pmc(struct perf_counter *counter, u64 ev,

				 unsigned int flags)

{

	int n;

	unsigned int alt[MAX_EVENT_ALTERNATIVES];

	u64 alt[MAX_EVENT_ALTERNATIVES];



	if (counter->hw_event.exclude_user

	    || counter->hw_event.exclude_kernel
@@ -776,10 +776,8 @@ static int can_go_on_limited_pmc(struct perf_counter *counter, unsigned int ev, 


	flags |= PPMU_LIMITED_PMC_OK | PPMU_LIMITED_PMC_REQD;

	n = ppmu->get_alternatives(ev, flags, alt);

	if (n)

		return alt[0];



	return 0;

	return n > 0;

}



/*
@@ -787,10 +785,9 @@ static int can_go_on_limited_pmc(struct perf_counter *counter, unsigned int ev, 
 * and return the event code, or 0 if there is no such alternative.

 * (Note: event code 0 is "don't count" on all machines.)

 */

static unsigned long normal_pmc_alternative(unsigned long ev,

					    unsigned long flags)

static u64 normal_pmc_alternative(u64 ev, unsigned long flags)

{

	unsigned int alt[MAX_EVENT_ALTERNATIVES];

	u64 alt[MAX_EVENT_ALTERNATIVES];

	int n;



	flags &= ~(PPMU_LIMITED_PMC_OK | PPMU_LIMITED_PMC_REQD);
@@ -820,9 +817,10 @@ static void hw_perf_counter_destroy(struct perf_counter *counter) 


const struct pmu *hw_perf_counter_init(struct perf_counter *counter)

{

	unsigned long ev, flags;

	u64 ev;

	unsigned long flags;

	struct perf_counter *ctrs[MAX_HWCOUNTERS];

	unsigned int events[MAX_HWCOUNTERS];

	u64 events[MAX_HWCOUNTERS];

	unsigned int cflags[MAX_HWCOUNTERS];

	int n;

	int err;

arch/powerpc/kernel/power4-pmu.c

+4 −5
Original line number Diff line number Diff line
@@ -213,7 +213,7 @@ static unsigned char direct_marked_event[8] = { 
 * Returns 1 if event counts things relating to marked instructions

 * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not.

 */

static int p4_marked_instr_event(unsigned int event)

static int p4_marked_instr_event(u64 event)

{

	int pmc, psel, unit, byte, bit;

	unsigned int mask;
@@ -249,7 +249,7 @@ static int p4_marked_instr_event(unsigned int event) 
	return (mask >> (byte * 8 + bit)) & 1;

}



static int p4_get_constraint(unsigned int event, u64 *maskp, u64 *valp)

static int p4_get_constraint(u64 event, u64 *maskp, u64 *valp)

{

	int pmc, byte, unit, lower, sh;

	u64 mask = 0, value = 0;
@@ -320,8 +320,7 @@ static unsigned int ppc_inst_cmpl[] = { 
	0x1001, 0x4001, 0x6001, 0x7001, 0x8001

};



static int p4_get_alternatives(unsigned int event, unsigned int flags,

			       unsigned int alt[])

static int p4_get_alternatives(u64 event, unsigned int flags, u64 alt[])

{

	int i, j, na;
@@ -353,7 +352,7 @@ static int p4_get_alternatives(unsigned int event, unsigned int flags, 
	return na;

}



static int p4_compute_mmcr(unsigned int event[], int n_ev,

static int p4_compute_mmcr(u64 event[], int n_ev,

			   unsigned int hwc[], u64 mmcr[])

{

	u64 mmcr0 = 0, mmcr1 = 0, mmcra = 0;

arch/powerpc/kernel/power5+-pmu.c

+7 −7
Original line number Diff line number Diff line
@@ -135,7 +135,7 @@ static u64 unit_cons[PM_LASTUNIT+1][2] = { 
	[PM_GRS] =   { 0x0e00000000ull, 0x0c40000000ull },

};



static int power5p_get_constraint(unsigned int event, u64 *maskp, u64 *valp)

static int power5p_get_constraint(u64 event, u64 *maskp, u64 *valp)

{

	int pmc, byte, unit, sh;

	int bit, fmask;
@@ -188,7 +188,7 @@ static int power5p_get_constraint(unsigned int event, u64 *maskp, u64 *valp) 
	return 0;

}



static int power5p_limited_pmc_event(unsigned int event)

static int power5p_limited_pmc_event(u64 event)

{

	int pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
@@ -273,11 +273,11 @@ static int find_alternative_bdecode(unsigned int event) 
	return -1;

}



static int power5p_get_alternatives(unsigned int event, unsigned int flags,

				    unsigned int alt[])

static int power5p_get_alternatives(u64 event, unsigned int flags, u64 alt[])

{

	int i, j, ae, nalt = 1;

	int i, j, nalt = 1;

	int nlim;

	u64 ae;



	alt[0] = event;

	nalt = 1;
@@ -402,7 +402,7 @@ static unsigned char direct_event_is_marked[0x28] = { 
 * Returns 1 if event counts things relating to marked instructions

 * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not.

 */

static int power5p_marked_instr_event(unsigned int event)

static int power5p_marked_instr_event(u64 event)

{

	int pmc, psel;

	int bit, byte, unit;
@@ -451,7 +451,7 @@ static int power5p_marked_instr_event(unsigned int event) 
	return (mask >> (byte * 8 + bit)) & 1;

}



static int power5p_compute_mmcr(unsigned int event[], int n_ev,

static int power5p_compute_mmcr(u64 event[], int n_ev,

				unsigned int hwc[], u64 mmcr[])

{

	u64 mmcr1 = 0;

arch/powerpc/kernel/power5-pmu.c

+8 −8
Original line number Diff line number Diff line
@@ -139,7 +139,7 @@ static u64 unit_cons[PM_LASTUNIT+1][2] = { 
	[PM_GRS] =   { 0x30002000000000ull, 0x30000400000000ull },

};



static int power5_get_constraint(unsigned int event, u64 *maskp, u64 *valp)

static int power5_get_constraint(u64 event, u64 *maskp, u64 *valp)

{

	int pmc, byte, unit, sh;

	int bit, fmask;
@@ -224,7 +224,7 @@ static const unsigned int event_alternatives[][MAX_ALT] = { 
 * Scan the alternatives table for a match and return the

 * index into the alternatives table if found, else -1.

 */

static int find_alternative(unsigned int event)

static int find_alternative(u64 event)

{

	int i, j;
@@ -250,7 +250,7 @@ static const unsigned char bytedecode_alternatives[4][4] = { 
 * PMCSEL values on other counters.  This returns the alternative

 * event code for those that do, or -1 otherwise.

 */

static int find_alternative_bdecode(unsigned int event)

static u64 find_alternative_bdecode(u64 event)

{

	int pmc, altpmc, pp, j;
@@ -269,10 +269,10 @@ static int find_alternative_bdecode(unsigned int event) 
	return -1;

}



static int power5_get_alternatives(unsigned int event, unsigned int flags,

				   unsigned int alt[])

static int power5_get_alternatives(u64 event, unsigned int flags, u64 alt[])

{

	int i, j, ae, nalt = 1;

	int i, j, nalt = 1;

	u64 ae;



	alt[0] = event;

	nalt = 1;
@@ -338,7 +338,7 @@ static unsigned char direct_event_is_marked[0x28] = { 
 * Returns 1 if event counts things relating to marked instructions

 * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not.

 */

static int power5_marked_instr_event(unsigned int event)

static int power5_marked_instr_event(u64 event)

{

	int pmc, psel;

	int bit, byte, unit;
@@ -382,7 +382,7 @@ static int power5_marked_instr_event(unsigned int event) 
	return (mask >> (byte * 8 + bit)) & 1;

}



static int power5_compute_mmcr(unsigned int event[], int n_ev,

static int power5_compute_mmcr(u64 event[], int n_ev,

			       unsigned int hwc[], u64 mmcr[])

{

	u64 mmcr1 = 0;