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Commit ef30e144 authored by Ben Dooks's avatar Ben Dooks
Browse files

[ARM] S3C: Rename sleep.S functions to be non-cpu specific 



Rename s3c2410_cpu_resume to s3c_cpu_resume and s3c2410_cpu_save to
s3c_cpu_save to remove the CPU specific naming of these functions
which are now in the generic PM code.

Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
parent 4e59c25d

arch/arm/mach-s3c2410/pm.c

+1 −1
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@ static void s3c2410_pm_prepare(void) 
{

	/* ensure at least GSTATUS3 has the resume address */



	__raw_writel(virt_to_phys(s3c2410_cpu_resume), S3C2410_GSTATUS3);

	__raw_writel(virt_to_phys(s3c_cpu_resume), S3C2410_GSTATUS3);



	S3C_PMDBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3));

	S3C_PMDBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4));

arch/arm/mach-s3c2412/mach-jive.c

+1 −1
Original line number Diff line number Diff line
@@ -494,7 +494,7 @@ static int jive_pm_suspend(struct sys_device *sd, pm_message_t state) 
	 * correct address to resume from. */



	__raw_writel(0x2BED, S3C2412_INFORM0);

	__raw_writel(virt_to_phys(s3c2410_cpu_resume), S3C2412_INFORM1);

	__raw_writel(virt_to_phys(s3c_cpu_resume), S3C2412_INFORM1);



	return 0;

}

arch/arm/plat-s3c/include/plat/pm.h

+3 −2
Original line number Diff line number Diff line
@@ -46,9 +46,10 @@ extern unsigned long s3c_pm_flags; 


/* from sleep.S */



extern int  s3c2410_cpu_save(unsigned long *saveblk);

extern int  s3c_cpu_save(unsigned long *saveblk);

extern void s3c_cpu_resume(void);



extern void s3c2410_cpu_suspend(void);

extern void s3c2410_cpu_resume(void);



extern unsigned long s3c_sleep_save_phys;

arch/arm/plat-s3c/pm.c

+2 −1
Original line number Diff line number Diff line
@@ -280,8 +280,9 @@ static int s3c_pm_enter(suspend_state_t state) 
	 * we resume as it saves its own register state, so use the return

	 * code to differentiate return from save and return from sleep */



	if (s3c2410_cpu_save(regs_save) == 0) {

	if (s3c_cpu_save(regs_save) == 0) {

		flush_cache_all();

		S3C_PMDBG("preparing to sleep\n");

		pm_cpu_sleep();

	}

arch/arm/plat-s3c24xx/sleep.S

+5 −5
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@ 


	.text



	/* s3c2410_cpu_save

	/* s3c_cpu_save

	 *

	 * save enough of the CPU state to allow us to re-start

	 * pm.c code. as we store items like the sp/lr, we will
@@ -59,7 +59,7 @@ 
	 *	     1 => resumed from sleep

	*/



ENTRY(s3c2410_cpu_save)

ENTRY(s3c_cpu_save)

	stmfd	sp!, { r4 - r12, lr }



	@@ store co-processor registers
@@ -99,12 +99,12 @@ s3c_sleep_save_phys: 


	/* sleep magic, to allow the bootloader to check for an valid

	 * image to resume to. Must be the first word before the

	 * s3c2410_cpu_resume entry.

	 * s3c_cpu_resume entry.

	*/



	.word	0x2bedf00d



	/* s3c2410_cpu_resume

	/* s3c_cpu_resume

	 *

	 * resume code entry for bootloader to call

	 *
@@ -113,7 +113,7 @@ s3c_sleep_save_phys: 
	 * must not write to the code segment (code is read-only)

	*/



ENTRY(s3c2410_cpu_resume)

ENTRY(s3c_cpu_resume)

	mov	r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE

	msr	cpsr_c, r0