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Commit ee114b97 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 fixes from Peter Anvin:
 "Trying again to get the fixes queue, including the fixed IDT alignment
  patch.

  The UEFI patch is by far the biggest issue at hand: it is currently
  causing quite a few machines to boot.  Which is sad, because the only
  reason they would is because their BIOSes touch memory that has
  already been freed.  The other major issue is that we finally have
  tracked down the root cause of a significant number of machines
  failing to suspend/resume"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86: Make sure IDT is page aligned
  x86, suspend: Handle CPUs which fail to #GP on RDMSR
  x86/platform/ce4100: Add header file for reboot type
  Revert "UEFI: Don't pass boot services regions to SetVirtualAddressMap()"
  efivars: check for EFI_RUNTIME_SERVICES
parents 4b8b8a4a 4df05f36

arch/x86/kernel/acpi/sleep.c

+16 −2
Original line number Diff line number Diff line
@@ -48,9 +48,20 @@ int x86_acpi_suspend_lowlevel(void) 
#ifndef CONFIG_64BIT

	native_store_gdt((struct desc_ptr *)&header->pmode_gdt);



	/*

	 * We have to check that we can write back the value, and not

	 * just read it.  At least on 90 nm Pentium M (Family 6, Model

	 * 13), reading an invalid MSR is not guaranteed to trap, see

	 * Erratum X4 in "Intel Pentium M Processor on 90 nm Process

	 * with 2-MB L2 Cache and Intel® Processor A100 and A110 on 90

	 * nm process with 512-KB L2 Cache Specification Update".

	 */

	if (!rdmsr_safe(MSR_EFER,

			&header->pmode_efer_low,

			&header->pmode_efer_high))

			&header->pmode_efer_high) &&

	    !wrmsr_safe(MSR_EFER,

			header->pmode_efer_low,

			header->pmode_efer_high))

		header->pmode_behavior |= (1 << WAKEUP_BEHAVIOR_RESTORE_EFER);

#endif /* !CONFIG_64BIT */
@@ -61,7 +72,10 @@ int x86_acpi_suspend_lowlevel(void) 
	}

	if (!rdmsr_safe(MSR_IA32_MISC_ENABLE,

			&header->pmode_misc_en_low,

			&header->pmode_misc_en_high))

			&header->pmode_misc_en_high) &&

	    !wrmsr_safe(MSR_IA32_MISC_ENABLE,

			header->pmode_misc_en_low,

			header->pmode_misc_en_high))

		header->pmode_behavior |=

			(1 << WAKEUP_BEHAVIOR_RESTORE_MISC_ENABLE);

	header->realmode_flags = acpi_realmode_flags;

arch/x86/kernel/head_64.S

+0 −15
Original line number Diff line number Diff line
@@ -512,21 +512,6 @@ ENTRY(phys_base) 


#include "../../x86/xen/xen-head.S"

	

	.section .bss, "aw", @nobits

	.align L1_CACHE_BYTES

ENTRY(idt_table)

	.skip IDT_ENTRIES * 16



	.align L1_CACHE_BYTES

ENTRY(debug_idt_table)

	.skip IDT_ENTRIES * 16



#ifdef CONFIG_TRACING

	.align L1_CACHE_BYTES

ENTRY(trace_idt_table)

	.skip IDT_ENTRIES * 16

#endif



	__PAGE_ALIGNED_BSS

NEXT_PAGE(empty_zero_page)

	.skip PAGE_SIZE

arch/x86/kernel/tracepoint.c

+2 −4
Original line number Diff line number Diff line
@@ -12,10 +12,8 @@ atomic_t trace_idt_ctr = ATOMIC_INIT(0); 
struct desc_ptr trace_idt_descr = { NR_VECTORS * 16 - 1,

				(unsigned long) trace_idt_table };



#ifndef CONFIG_X86_64

gate_desc trace_idt_table[NR_VECTORS] __page_aligned_data

					= { { { { 0, 0 } } }, };

#endif

/* No need to be aligned, but done to keep all IDTs defined the same way. */

gate_desc trace_idt_table[NR_VECTORS] __page_aligned_bss;



static int trace_irq_vector_refcount;

static DEFINE_MUTEX(irq_vector_mutex);

arch/x86/kernel/traps.c

+6 −6
Original line number Diff line number Diff line
@@ -63,19 +63,19 @@ 
#include <asm/x86_init.h>

#include <asm/pgalloc.h>

#include <asm/proto.h>



/* No need to be aligned, but done to keep all IDTs defined the same way. */

gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss;

#else

#include <asm/processor-flags.h>

#include <asm/setup.h>



asmlinkage int system_call(void);



/*

 * The IDT has to be page-aligned to simplify the Pentium

 * F0 0F bug workaround.

 */

gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };

#endif



/* Must be page-aligned because the real IDT is used in a fixmap. */

gate_desc idt_table[NR_VECTORS] __page_aligned_bss;



DECLARE_BITMAP(used_vectors, NR_VECTORS);

EXPORT_SYMBOL_GPL(used_vectors);

arch/x86/platform/ce4100/ce4100.c

+1 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ 
#include <linux/module.h>

#include <linux/serial_reg.h>

#include <linux/serial_8250.h>

#include <linux/reboot.h>



#include <asm/ce4100.h>

#include <asm/prom.h>