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Commit ed160672 authored by Sandeep Paulraj's avatar Sandeep Paulraj Committed by Kevin Hilman
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DaVinci: DM365: Correct USB parent clock



The parent clock for the USB source clock is actually PLL1 aux clock,
not PLL2 sysclk1.

Signed-off-by: default avatarSandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
parent eb5ba378
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+1 −1
Original line number Diff line number Diff line
@@ -369,7 +369,7 @@ static struct clk timer3_clk = {

static struct clk usb_clk = {
	.name		= "usb",
	.parent		= &pll2_sysclk1,
	.parent		= &pll1_aux_clk,
	.lpsc		= DAVINCI_LPSC_USB,
};