Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ea9197cc authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nv50/disp: force dac power state during load detect 



fdo#64904

Reported-by: default avatarGerhard Bräunlich <wippbox@gmx.net>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 89e033a4

drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c

+4 −0
Original line number Diff line number Diff line
@@ -50,11 +50,15 @@ nv50_dac_sense(struct nv50_disp_priv *priv, int or, u32 loadval) 
{

	const u32 doff = (or * 0x800);

	int load = -EINVAL;

	nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80150000);

	nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000);

	nv_wr32(priv, 0x61a00c + doff, 0x00100000 | loadval);

	udelay(9500);

	nv_wr32(priv, 0x61a00c + doff, 0x80000000);

	load = (nv_rd32(priv, 0x61a00c + doff) & 0x38000000) >> 27;

	nv_wr32(priv, 0x61a00c + doff, 0x00000000);

	nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80550000);

	nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000);

	return load;

}

drivers/gpu/drm/nouveau/core/include/core/class.h

+1 −1
Original line number Diff line number Diff line
@@ -218,7 +218,7 @@ struct nv04_display_class { 
#define NV50_DISP_DAC_PWR_STATE                                      0x00000040

#define NV50_DISP_DAC_PWR_STATE_ON                                   0x00000000

#define NV50_DISP_DAC_PWR_STATE_OFF                                  0x00000040

#define NV50_DISP_DAC_LOAD                                           0x0002000c

#define NV50_DISP_DAC_LOAD                                           0x00020100

#define NV50_DISP_DAC_LOAD_VALUE                                     0x00000007



#define NV50_DISP_PIOR_MTHD                                          0x00030000