Commit ea171967 authored Aug 01, 2014 by Mark Rutland Committed by Will Deacon Aug 01, 2014

arm64: add newline to I-cache policy string



Due to a missing newline in the I-cache policy detection log output,
it's possible to get some ratehr unfortunate output at boot time:

CPU1: Booted secondary processor
Detected VIPT I-cache on CPU1CPU2: Booted secondary processor
Detected VIPT I-cache on CPU2CPU3: Booted secondary processor
Detected VIPT I-cache on CPU3CPU4: Booted secondary processor
Detected PIPT I-cache on CPU4CPU5: Booted secondary processor
Detected PIPT I-cache on CPU5Brought up 6 CPUs
SMP: Total of 6 processors activated.

This patch adds the missing newline to the format string, cleaning up
the output.

Fixes: 59ccc0d4 ("arm64: cachetype: report weakest cache policy")
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

parent 94156675

arch/arm64/kernel/cpuinfo.c

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -52,7 +52,7 @@ static void cpuinfo_detect_icache_policy(struct cpuinfo_arm64 *info)
	if (l1ip == ICACHE_POLICY_AIVIVT);		if (l1ip == ICACHE_POLICY_AIVIVT);
	set_bit(ICACHEF_AIVIVT, &__icache_flags);		set_bit(ICACHEF_AIVIVT, &__icache_flags);

	pr_info("Detected %s I-cache on CPU%d", icache_policy_str[l1ip], cpu);		pr_info("Detected %s I-cache on CPU%d\n", icache_policy_str[l1ip], cpu);
	}		}

	static int check_reg_mask(char *name, u64 mask, u64 boot, u64 cur, int cpu)		static int check_reg_mask(char *name, u64 mask, u64 boot, u64 cur, int cpu)