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Commit e9d91238 authored by Pierre Moreau's avatar Pierre Moreau Committed by Ben Skeggs
Browse files

drm/nouveau/fb/ram/mcp77: enable NISO poller 



Signed-off-by: default avatarPierre Moreau <pierre.morrow@free.fr>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 5f3ac299

drivers/gpu/drm/nouveau/core/subdev/fb/ramnvaa.c

+39 −5
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ 


struct nvaa_ram_priv {

	struct nouveau_ram base;

	u64 poller_base;

};



static int
@@ -33,8 +34,8 @@ nvaa_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	      struct nouveau_oclass *oclass, void *data, u32 datasize,

	      struct nouveau_object **pobject)

{

	const u32 rsvd_head = ( 256 * 1024) >> 12; /* vga memory */

	const u32 rsvd_tail = (1024 * 1024) >> 12; /* vbios etc */

	u32 rsvd_head = ( 256 * 1024); /* vga memory */

	u32 rsvd_tail = (1024 * 1024); /* vbios etc */

	struct nouveau_fb *pfb = nouveau_fb(parent);

	struct nvaa_ram_priv *priv;

	int ret;
@@ -48,8 +49,12 @@ nvaa_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	priv->base.stolen = (u64)nv_rd32(pfb, 0x100e10) << 12;

	priv->base.size   = (u64)nv_rd32(pfb, 0x100e14) << 12;



	ret = nouveau_mm_init(&pfb->vram, rsvd_head, (priv->base.size >> 12) -

			      (rsvd_head + rsvd_tail), 1);

	rsvd_tail += 0x1000;

	priv->poller_base = priv->base.size - rsvd_tail;



	ret = nouveau_mm_init(&pfb->vram, rsvd_head >> 12,

			      (priv->base.size  - (rsvd_head + rsvd_tail)) >> 12,

			      1);

	if (ret)

		return ret;
@@ -58,12 +63,41 @@ nvaa_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	return 0;

}



static int

nvaa_ram_init(struct nouveau_object *object)

{

	struct nouveau_fb *pfb = nouveau_fb(object);

	struct nvaa_ram_priv *priv = (void *)object;

	int ret;

	u64 dniso, hostnb, flush;



	ret = nouveau_ram_init(&priv->base);

	if (ret)

		return ret;



	dniso  = ((priv->base.size - (priv->poller_base + 0x00)) >> 5) - 1;

	hostnb = ((priv->base.size - (priv->poller_base + 0x20)) >> 5) - 1;

	flush  = ((priv->base.size - (priv->poller_base + 0x40)) >> 5) - 1;



	/* Enable NISO poller for various clients and set their associated

	 * read address, only for MCP77/78 and MCP79/7A. (fd#25701)

	 */

	nv_wr32(pfb, 0x100c18, dniso);

	nv_mask(pfb, 0x100c14, 0x00000000, 0x00000001);

	nv_wr32(pfb, 0x100c1c, hostnb);

	nv_mask(pfb, 0x100c14, 0x00000000, 0x00000002);

	nv_wr32(pfb, 0x100c24, flush);

	nv_mask(pfb, 0x100c14, 0x00000000, 0x00010000);



	return 0;

}



struct nouveau_oclass

nvaa_ram_oclass = {

	.ofuncs = &(struct nouveau_ofuncs) {

		.ctor = nvaa_ram_ctor,

		.dtor = _nouveau_ram_dtor,

		.init = _nouveau_ram_init,

		.init = nvaa_ram_init,

		.fini = _nouveau_ram_fini,

	},

};