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Commit e9a37110 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt
Browse files

Merge remote-tracking branch 'agust/next' into next 

<<
Switch mpc512x to the common clock framework and adapt mpc512x
drivers to use the new clock driver. Old PPC_CLOCK code is
removed entirely since there are no users any more.
>>
parents d891ea23 bc750594

arch/powerpc/Kconfig

+0 −5
Original line number Diff line number Diff line
@@ -1045,11 +1045,6 @@ config KEYS_COMPAT 


source "crypto/Kconfig"



config PPC_CLOCK

	bool

	default n

	select HAVE_CLK



config PPC_LIB_RHEAP

	bool

arch/powerpc/boot/dts/ac14xx.dts

+7 −0
Original line number Diff line number Diff line
@@ -139,7 +139,14 @@ 
		};

	};



	clocks {

		osc {

			clock-frequency = <25000000>;

		};

	};



	soc@80000000 {

		bus-frequency = <80000000>;	/* 80 MHz ips bus */



		clock@f00 {

			compatible = "fsl,mpc5121rev2-clock", "fsl,mpc5121-clock";

arch/powerpc/boot/dts/mpc5121.dtsi

+112 −1
Original line number Diff line number Diff line
@@ -9,6 +9,8 @@ 
 * option) any later version.

 */



#include <dt-bindings/clock/mpc512x-clock.h>



/dts-v1/;



/ {
@@ -49,6 +51,10 @@ 
		compatible = "fsl,mpc5121-mbx";

		reg = <0x20000000 0x4000>;

		interrupts = <66 0x8>;

		clocks = <&clks MPC512x_CLK_MBX_BUS>,

			 <&clks MPC512x_CLK_MBX_3D>,

			 <&clks MPC512x_CLK_MBX>;

		clock-names = "mbx-bus", "mbx-3d", "mbx";

	};



	sram@30000000 {
@@ -62,6 +68,8 @@ 
		interrupts = <6 8>;

		#address-cells = <1>;

		#size-cells = <1>;

		clocks = <&clks MPC512x_CLK_NFC>;

		clock-names = "ipg";

	};



	localbus@80000020 {
@@ -73,6 +81,17 @@ 
		ranges = <0x0 0x0 0xfc000000 0x04000000>;

	};



	clocks {

		#address-cells = <1>;

		#size-cells = <0>;



		osc: osc {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <33000000>;

		};

	};



	soc@80000000 {

		compatible = "fsl,mpc5121-immr";

		#address-cells = <1>;
@@ -117,9 +136,12 @@ 
		};



		/* Clock control */

		clock@f00 {

		clks: clock@f00 {

			compatible = "fsl,mpc5121-clock";

			reg = <0xf00 0x100>;

			#clock-cells = <1>;

			clocks = <&osc>;

			clock-names = "osc";

		};



		/* Power Management Controller */
@@ -139,12 +161,24 @@ 
			compatible = "fsl,mpc5121-mscan";

			reg = <0x1300 0x80>;

			interrupts = <12 0x8>;

			clocks = <&clks MPC512x_CLK_BDLC>,

				 <&clks MPC512x_CLK_IPS>,

				 <&clks MPC512x_CLK_SYS>,

				 <&clks MPC512x_CLK_REF>,

				 <&clks MPC512x_CLK_MSCAN0_MCLK>;

			clock-names = "ipg", "ips", "sys", "ref", "mclk";

		};



		can@1380 {

			compatible = "fsl,mpc5121-mscan";

			reg = <0x1380 0x80>;

			interrupts = <13 0x8>;

			clocks = <&clks MPC512x_CLK_BDLC>,

				 <&clks MPC512x_CLK_IPS>,

				 <&clks MPC512x_CLK_SYS>,

				 <&clks MPC512x_CLK_REF>,

				 <&clks MPC512x_CLK_MSCAN1_MCLK>;

			clock-names = "ipg", "ips", "sys", "ref", "mclk";

		};



		sdhc@1500 {
@@ -153,6 +187,9 @@ 
			interrupts = <8 0x8>;

			dmas = <&dma0 30>;

			dma-names = "rx-tx";

			clocks = <&clks MPC512x_CLK_IPS>,

				 <&clks MPC512x_CLK_SDHC>;

			clock-names = "ipg", "per";

		};



		i2c@1700 {
@@ -161,6 +198,8 @@ 
			compatible = "fsl,mpc5121-i2c", "fsl-i2c";

			reg = <0x1700 0x20>;

			interrupts = <9 0x8>;

			clocks = <&clks MPC512x_CLK_I2C>;

			clock-names = "ipg";

		};



		i2c@1720 {
@@ -169,6 +208,8 @@ 
			compatible = "fsl,mpc5121-i2c", "fsl-i2c";

			reg = <0x1720 0x20>;

			interrupts = <10 0x8>;

			clocks = <&clks MPC512x_CLK_I2C>;

			clock-names = "ipg";

		};



		i2c@1740 {
@@ -177,6 +218,8 @@ 
			compatible = "fsl,mpc5121-i2c", "fsl-i2c";

			reg = <0x1740 0x20>;

			interrupts = <11 0x8>;

			clocks = <&clks MPC512x_CLK_I2C>;

			clock-names = "ipg";

		};



		i2ccontrol@1760 {
@@ -188,30 +231,48 @@ 
			compatible = "fsl,mpc5121-axe";

			reg = <0x2000 0x100>;

			interrupts = <42 0x8>;

			clocks = <&clks MPC512x_CLK_AXE>;

			clock-names = "ipg";

		};



		display@2100 {

			compatible = "fsl,mpc5121-diu";

			reg = <0x2100 0x100>;

			interrupts = <64 0x8>;

			clocks = <&clks MPC512x_CLK_DIU>;

			clock-names = "ipg";

		};



		can@2300 {

			compatible = "fsl,mpc5121-mscan";

			reg = <0x2300 0x80>;

			interrupts = <90 0x8>;

			clocks = <&clks MPC512x_CLK_BDLC>,

				 <&clks MPC512x_CLK_IPS>,

				 <&clks MPC512x_CLK_SYS>,

				 <&clks MPC512x_CLK_REF>,

				 <&clks MPC512x_CLK_MSCAN2_MCLK>;

			clock-names = "ipg", "ips", "sys", "ref", "mclk";

		};



		can@2380 {

			compatible = "fsl,mpc5121-mscan";

			reg = <0x2380 0x80>;

			interrupts = <91 0x8>;

			clocks = <&clks MPC512x_CLK_BDLC>,

				 <&clks MPC512x_CLK_IPS>,

				 <&clks MPC512x_CLK_SYS>,

				 <&clks MPC512x_CLK_REF>,

				 <&clks MPC512x_CLK_MSCAN3_MCLK>;

			clock-names = "ipg", "ips", "sys", "ref", "mclk";

		};



		viu@2400 {

			compatible = "fsl,mpc5121-viu";

			reg = <0x2400 0x400>;

			interrupts = <67 0x8>;

			clocks = <&clks MPC512x_CLK_VIU>;

			clock-names = "ipg";

		};



		mdio@2800 {
@@ -219,6 +280,8 @@ 
			reg = <0x2800 0x800>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&clks MPC512x_CLK_FEC>;

			clock-names = "per";

		};



		eth0: ethernet@2800 {
@@ -227,6 +290,8 @@ 
			reg = <0x2800 0x800>;

			local-mac-address = [ 00 00 00 00 00 00 ];

			interrupts = <4 0x8>;

			clocks = <&clks MPC512x_CLK_FEC>;

			clock-names = "per";

		};



		/* USB1 using external ULPI PHY */
@@ -238,6 +303,8 @@ 
			interrupts = <43 0x8>;

			dr_mode = "otg";

			phy_type = "ulpi";

			clocks = <&clks MPC512x_CLK_USB1>;

			clock-names = "ipg";

		};



		/* USB0 using internal UTMI PHY */
@@ -249,6 +316,8 @@ 
			interrupts = <44 0x8>;

			dr_mode = "otg";

			phy_type = "utmi_wide";

			clocks = <&clks MPC512x_CLK_USB2>;

			clock-names = "ipg";

		};



		/* IO control */
@@ -267,6 +336,8 @@ 
			compatible = "fsl,mpc5121-pata";

			reg = <0x10200 0x100>;

			interrupts = <5 0x8>;

			clocks = <&clks MPC512x_CLK_PATA>;

			clock-names = "ipg";

		};



		/* 512x PSCs are not 52xx PSC compatible */
@@ -278,6 +349,9 @@ 
			interrupts = <40 0x8>;

			fsl,rx-fifo-size = <16>;

			fsl,tx-fifo-size = <16>;

			clocks = <&clks MPC512x_CLK_PSC0>,

				 <&clks MPC512x_CLK_PSC0_MCLK>;

			clock-names = "ipg", "mclk";

		};



		/* PSC1 */
@@ -287,6 +361,9 @@ 
			interrupts = <40 0x8>;

			fsl,rx-fifo-size = <16>;

			fsl,tx-fifo-size = <16>;

			clocks = <&clks MPC512x_CLK_PSC1>,

				 <&clks MPC512x_CLK_PSC1_MCLK>;

			clock-names = "ipg", "mclk";

		};



		/* PSC2 */
@@ -296,6 +373,9 @@ 
			interrupts = <40 0x8>;

			fsl,rx-fifo-size = <16>;

			fsl,tx-fifo-size = <16>;

			clocks = <&clks MPC512x_CLK_PSC2>,

				 <&clks MPC512x_CLK_PSC2_MCLK>;

			clock-names = "ipg", "mclk";

		};



		/* PSC3 */
@@ -305,6 +385,9 @@ 
			interrupts = <40 0x8>;

			fsl,rx-fifo-size = <16>;

			fsl,tx-fifo-size = <16>;

			clocks = <&clks MPC512x_CLK_PSC3>,

				 <&clks MPC512x_CLK_PSC3_MCLK>;

			clock-names = "ipg", "mclk";

		};



		/* PSC4 */
@@ -314,6 +397,9 @@ 
			interrupts = <40 0x8>;

			fsl,rx-fifo-size = <16>;

			fsl,tx-fifo-size = <16>;

			clocks = <&clks MPC512x_CLK_PSC4>,

				 <&clks MPC512x_CLK_PSC4_MCLK>;

			clock-names = "ipg", "mclk";

		};



		/* PSC5 */
@@ -323,6 +409,9 @@ 
			interrupts = <40 0x8>;

			fsl,rx-fifo-size = <16>;

			fsl,tx-fifo-size = <16>;

			clocks = <&clks MPC512x_CLK_PSC5>,

				 <&clks MPC512x_CLK_PSC5_MCLK>;

			clock-names = "ipg", "mclk";

		};



		/* PSC6 */
@@ -332,6 +421,9 @@ 
			interrupts = <40 0x8>;

			fsl,rx-fifo-size = <16>;

			fsl,tx-fifo-size = <16>;

			clocks = <&clks MPC512x_CLK_PSC6>,

				 <&clks MPC512x_CLK_PSC6_MCLK>;

			clock-names = "ipg", "mclk";

		};



		/* PSC7 */
@@ -341,6 +433,9 @@ 
			interrupts = <40 0x8>;

			fsl,rx-fifo-size = <16>;

			fsl,tx-fifo-size = <16>;

			clocks = <&clks MPC512x_CLK_PSC7>,

				 <&clks MPC512x_CLK_PSC7_MCLK>;

			clock-names = "ipg", "mclk";

		};



		/* PSC8 */
@@ -350,6 +445,9 @@ 
			interrupts = <40 0x8>;

			fsl,rx-fifo-size = <16>;

			fsl,tx-fifo-size = <16>;

			clocks = <&clks MPC512x_CLK_PSC8>,

				 <&clks MPC512x_CLK_PSC8_MCLK>;

			clock-names = "ipg", "mclk";

		};



		/* PSC9 */
@@ -359,6 +457,9 @@ 
			interrupts = <40 0x8>;

			fsl,rx-fifo-size = <16>;

			fsl,tx-fifo-size = <16>;

			clocks = <&clks MPC512x_CLK_PSC9>,

				 <&clks MPC512x_CLK_PSC9_MCLK>;

			clock-names = "ipg", "mclk";

		};



		/* PSC10 */
@@ -368,6 +469,9 @@ 
			interrupts = <40 0x8>;

			fsl,rx-fifo-size = <16>;

			fsl,tx-fifo-size = <16>;

			clocks = <&clks MPC512x_CLK_PSC10>,

				 <&clks MPC512x_CLK_PSC10_MCLK>;

			clock-names = "ipg", "mclk";

		};



		/* PSC11 */
@@ -377,12 +481,17 @@ 
			interrupts = <40 0x8>;

			fsl,rx-fifo-size = <16>;

			fsl,tx-fifo-size = <16>;

			clocks = <&clks MPC512x_CLK_PSC11>,

				 <&clks MPC512x_CLK_PSC11_MCLK>;

			clock-names = "ipg", "mclk";

		};



		pscfifo@11f00 {

			compatible = "fsl,mpc5121-psc-fifo";

			reg = <0x11f00 0x100>;

			interrupts = <40 0x8>;

			clocks = <&clks MPC512x_CLK_PSC_FIFO>;

			clock-names = "ipg";

		};



		dma0: dma@14000 {
@@ -400,6 +509,8 @@ 
		#address-cells = <3>;

		#size-cells = <2>;

		#interrupt-cells = <1>;

		clocks = <&clks MPC512x_CLK_PCI>;

		clock-names = "ipg";



		reg = <0x80008500 0x100	/* internal registers */

		       0x80008300 0x8>;	/* config space access registers */

arch/powerpc/boot/dts/mpc5125twr.dts

+52 −1
Original line number Diff line number Diff line
@@ -12,6 +12,8 @@ 
 * option) any later version.

 */



#include <dt-bindings/clock/mpc512x-clock.h>



/dts-v1/;



/ {
@@ -54,6 +56,17 @@ 
		reg = <0x30000000 0x08000>;		// 32K at 0x30000000

	};



	clocks {

		#address-cells = <1>;

		#size-cells = <0>;



		osc: osc {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <33000000>;

		};

	};



	soc@80000000 {

		compatible = "fsl,mpc5121-immr";

		#address-cells = <1>;
@@ -87,9 +100,12 @@ 
			reg = <0xe00 0x100>;

		};



		clock@f00 {	// Clock control

		clks: clock@f00 {	// Clock control

			compatible = "fsl,mpc5121-clock";

			reg = <0xf00 0x100>;

			#clock-cells = <1>;

			clocks = <&osc>;

			clock-names = "osc";

		};



		pmc@1000{  // Power Management Controller
@@ -114,18 +130,33 @@ 
			compatible = "fsl,mpc5121-mscan";

			interrupts = <12 0x8>;

			reg = <0x1300 0x80>;

			clocks = <&clks MPC512x_CLK_BDLC>,

				 <&clks MPC512x_CLK_IPS>,

				 <&clks MPC512x_CLK_SYS>,

				 <&clks MPC512x_CLK_REF>,

				 <&clks MPC512x_CLK_MSCAN0_MCLK>;

			clock-names = "ipg", "ips", "sys", "ref", "mclk";

		};



		can@1380 {

			compatible = "fsl,mpc5121-mscan";

			interrupts = <13 0x8>;

			reg = <0x1380 0x80>;

			clocks = <&clks MPC512x_CLK_BDLC>,

				 <&clks MPC512x_CLK_IPS>,

				 <&clks MPC512x_CLK_SYS>,

				 <&clks MPC512x_CLK_REF>,

				 <&clks MPC512x_CLK_MSCAN1_MCLK>;

			clock-names = "ipg", "ips", "sys", "ref", "mclk";

		};



		sdhc@1500 {

			compatible = "fsl,mpc5121-sdhc";

			interrupts = <8 0x8>;

			reg = <0x1500 0x100>;

			clocks = <&clks MPC512x_CLK_IPS>,

				 <&clks MPC512x_CLK_SDHC>;

			clock-names = "ipg", "per";

		};



		i2c@1700 {
@@ -134,6 +165,8 @@ 
			compatible = "fsl,mpc5121-i2c", "fsl-i2c";

			reg = <0x1700 0x20>;

			interrupts = <0x9 0x8>;

			clocks = <&clks MPC512x_CLK_I2C>;

			clock-names = "ipg";

		};



		i2c@1720 {
@@ -142,6 +175,8 @@ 
			compatible = "fsl,mpc5121-i2c", "fsl-i2c";

			reg = <0x1720 0x20>;

			interrupts = <0xa 0x8>;

			clocks = <&clks MPC512x_CLK_I2C>;

			clock-names = "ipg";

		};



		i2c@1740 {
@@ -150,6 +185,8 @@ 
			compatible = "fsl,mpc5121-i2c", "fsl-i2c";

			reg = <0x1740 0x20>;

			interrupts = <0xb 0x8>;

			clocks = <&clks MPC512x_CLK_I2C>;

			clock-names = "ipg";

		};



		i2ccontrol@1760 {
@@ -161,6 +198,8 @@ 
			compatible = "fsl,mpc5121-diu";

			reg = <0x2100 0x100>;

			interrupts = <64 0x8>;

			clocks = <&clks MPC512x_CLK_DIU>;

			clock-names = "ipg";

		};



		mdio@2800 {
@@ -180,6 +219,8 @@ 
			interrupts = <4 0x8>;

			phy-handle = < &phy0 >;

			phy-connection-type = "rmii";

			clocks = <&clks MPC512x_CLK_FEC>;

			clock-names = "per";

		};



		// IO control
@@ -200,6 +241,8 @@ 
			interrupts = <43 0x8>;

			dr_mode = "host";

			phy_type = "ulpi";

			clocks = <&clks MPC512x_CLK_USB1>;

			clock-names = "ipg";

			status = "disabled";

		};
@@ -211,6 +254,9 @@ 
			interrupts = <40 0x8>;

			fsl,rx-fifo-size = <16>;

			fsl,tx-fifo-size = <16>;

			clocks = <&clks MPC512x_CLK_PSC1>,

				 <&clks MPC512x_CLK_PSC1_MCLK>;

			clock-names = "ipg", "mclk";

		};



		// PSC9 uart1 aka ttyPSC1
@@ -220,12 +266,17 @@ 
			interrupts = <40 0x8>;

			fsl,rx-fifo-size = <16>;

			fsl,tx-fifo-size = <16>;

			clocks = <&clks MPC512x_CLK_PSC9>,

				 <&clks MPC512x_CLK_PSC9_MCLK>;

			clock-names = "ipg", "mclk";

		};



		pscfifo@11f00 {

			compatible = "fsl,mpc5121-psc-fifo";

			reg = <0x11f00 0x100>;

			interrupts = <40 0x8>;

			clocks = <&clks MPC512x_CLK_PSC_FIFO>;

			clock-names = "ipg";

		};



		dma@14000 {

arch/powerpc/include/asm/clk_interface.h

deleted100644 → 0
+0 −20
Original line number Diff line number Diff line 
#ifndef __ASM_POWERPC_CLK_INTERFACE_H

#define __ASM_POWERPC_CLK_INTERFACE_H



#include <linux/clk.h>



struct clk_interface {

	struct clk*	(*clk_get)	(struct device *dev, const char *id);

	int		(*clk_enable)	(struct clk *clk);

	void		(*clk_disable)	(struct clk *clk);

	unsigned long	(*clk_get_rate)	(struct clk *clk);

	void		(*clk_put)	(struct clk *clk);

	long		(*clk_round_rate) (struct clk *clk, unsigned long rate);

	int 		(*clk_set_rate)	(struct clk *clk, unsigned long rate);

	int		(*clk_set_parent) (struct clk *clk, struct clk *parent);

	struct clk*	(*clk_get_parent) (struct clk *clk);

};



extern struct clk_interface clk_functions;



#endif /* __ASM_POWERPC_CLK_INTERFACE_H */