Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit e8f6f3b4 authored by Christophe Ricard's avatar Christophe Ricard Committed by Peter Huewe
Browse files

tpm/tpm_i2c_stm_st33/dts/st33zp24_i2c: Add DTS Documentation 



st33zp24 tpm can be seen as a trivial i2c device as other i2c tpm.
However several other properties needs to be documented such as lpcpd.

Reviewed-by: default avatarJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: default avatarChristophe Ricard <christophe-h.ricard@st.com>
Signed-off-by: default avatarPeter Huewe <peterhuewe@gmx.de>
parent c36b1b2d

Documentation/devicetree/bindings/security/tpm/st33zp24.txt

0 → 100644
+36 −0
Original line number Diff line number Diff line 
* STMicroelectronics SAS. ST33ZP24 TPM SoC



Required properties:

- compatible: Should be "st,st33zp24-i2c".

- clock-frequency: I²C work frequency.

- reg: address on the bus



Optional ST33ZP24 Properties:

- interrupt-parent: phandle for the interrupt gpio controller

- interrupts: GPIO interrupt to which the chip is connected

- lpcpd-gpios: Output GPIO pin used for ST33ZP24 power management D1/D2 state.

If set, power must be present when the platform is going into sleep/hibernate mode.



Optional SoC Specific Properties:

- pinctrl-names: Contains only one value - "default".

- pintctrl-0: Specifies the pin control groups used for this controller.



Example (for ARM-based BeagleBoard xM with ST33ZP24 on I2C2):



&i2c2 {



        status = "okay";



        st33zp24: st33zp24@13 {



                compatible = "st,st33zp24-i2c";



                reg = <0x013>;

                clock-frequency = <400000>;



                interrupt-parent = <&gpio5>;

                interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;



                lpcpd-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;

        };

};