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Flush the writes to IRQSTATUS_L0 register in the DMA interrupt handler by reading the register directly after write. This prevents the spurious DMA interrupts noted when using VDD_OPP 1 Signed-off-by:Mathias Nyman <mathias.nyman@nokia.com> Acked-by:
Santosh Shilimkar <Santosh.shilimkar@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>