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Commit e8153ab3 authored by Mark Brown's avatar Mark Brown
Browse files

spi/omap-100k: Factor message transfer function out of work queue 



In preparation for removing the custom workqueue.

Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent 69ea672a

drivers/spi/spi-omap-100k.c

+68 −65
Original line number Diff line number Diff line
@@ -321,39 +321,15 @@ static int omap1_spi100k_setup(struct spi_device *spi) 
	return ret;

}



static void omap1_spi100k_work(struct work_struct *work)

static int omap1_spi100k_transfer_one_message(struct spi_master *master,

					      struct spi_message *m)

{

	struct omap1_spi100k    *spi100k;

	int status = 0;



	spi100k = container_of(work, struct omap1_spi100k, work);

	spin_lock_irq(&spi100k->lock);



	clk_enable(spi100k->ick);

	clk_enable(spi100k->fck);



	/* We only enable one channel at a time -- the one whose message is

	 * at the head of the queue -- although this controller would gladly

	 * arbitrate among multiple channels.  This corresponds to "single

	 * channel" master mode.  As a side effect, we need to manage the

	 * chipselect with the FORCE bit ... CS != channel enable.

	 */

	 while (!list_empty(&spi100k->msg_queue)) {

		struct spi_message              *m;

		struct spi_device               *spi;

	struct omap1_spi100k *spi100k = spi_master_get_devdata(master);

	struct spi_device *spi = m->spi;

	struct spi_transfer *t = NULL;

	int cs_active = 0;

		struct omap1_spi100k_cs         *cs;

	int par_override = 0;



		m = container_of(spi100k->msg_queue.next, struct spi_message,

				 queue);



		list_del_init(&m->queue);

		spin_unlock_irq(&spi100k->lock);



		spi = m->spi;

		cs = spi->controller_state;

	int status = 0;



	list_for_each_entry(t, &m->transfers, transfer_list) {

		if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) {
@@ -409,15 +385,42 @@ static void omap1_spi100k_work(struct work_struct *work) 
	m->status = status;

	m->complete(m->context);



	return status;

}



static void omap1_spi100k_work(struct work_struct *work)

{

	struct omap1_spi100k    *spi100k;



	spi100k = container_of(work, struct omap1_spi100k, work);

	spin_lock_irq(&spi100k->lock);



	clk_enable(spi100k->ick);

	clk_enable(spi100k->fck);



	/* We only enable one channel at a time -- the one whose message is

	 * at the head of the queue -- although this controller would gladly

	 * arbitrate among multiple channels.  This corresponds to "single

	 * channel" master mode.  As a side effect, we need to manage the

	 * chipselect with the FORCE bit ... CS != channel enable.

	 */

	 while (!list_empty(&spi100k->msg_queue)) {

		struct spi_message              *m;



		m = container_of(spi100k->msg_queue.next, struct spi_message,

				 queue);



		list_del_init(&m->queue);

		spin_unlock_irq(&spi100k->lock);



		omap1_spi100k_transfer_one_message(m->spi->master, m);



		spin_lock_irq(&spi100k->lock);

	}



	clk_disable(spi100k->ick);

	clk_disable(spi100k->fck);

	spin_unlock_irq(&spi100k->lock);



	if (status < 0)

		printk(KERN_WARNING "spi transfer failed with %d\n", status);

}



static int omap1_spi100k_transfer(struct spi_device *spi, struct spi_message *m)