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Commit e65e49d0 authored by Mike Travis's avatar Mike Travis
Browse files

irq: update all arches for new irq_desc 



Impact: cleanup, update to new cpumask API

Irq_desc.affinity and irq_desc.pending_mask are now cpumask_var_t's
so access to them should be using the new cpumask API.

Signed-off-by: default avatarMike Travis <travis@sgi.com>
parent 28e08861

arch/alpha/kernel/irq.c

+1 −1
Original line number Diff line number Diff line
@@ -55,7 +55,7 @@ int irq_select_affinity(unsigned int irq) 
		cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0);

	last_cpu = cpu;



	irq_desc[irq].affinity = cpumask_of_cpu(cpu);

	cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu));

	irq_desc[irq].chip->set_affinity(irq, cpumask_of(cpu));

	return 0;

}

arch/arm/kernel/irq.c

+12 −6
Original line number Diff line number Diff line
@@ -104,6 +104,11 @@ static struct irq_desc bad_irq_desc = { 
	.lock = SPIN_LOCK_UNLOCKED

};



#ifdef CONFIG_CPUMASK_OFFSTACK

/* We are not allocating bad_irq_desc.affinity or .pending_mask */

#error "ARM architecture does not support CONFIG_CPUMASK_OFFSTACK."

#endif



/*

 * do_IRQ handles all hardware IRQ's.  Decoded IRQs should not

 * come via this function.  Instead, they should provide their
@@ -161,7 +166,7 @@ void __init init_IRQ(void) 
		irq_desc[irq].status |= IRQ_NOREQUEST | IRQ_NOPROBE;



#ifdef CONFIG_SMP

	bad_irq_desc.affinity = CPU_MASK_ALL;

	cpumask_setall(bad_irq_desc.affinity);

	bad_irq_desc.cpu = smp_processor_id();

#endif

	init_arch_irq();
@@ -191,15 +196,16 @@ void migrate_irqs(void) 
		struct irq_desc *desc = irq_desc + i;



		if (desc->cpu == cpu) {

			unsigned int newcpu = any_online_cpu(desc->affinity);



			if (newcpu == NR_CPUS) {

			unsigned int newcpu = cpumask_any_and(desc->affinity,

							      cpu_online_mask);

			if (newcpu >= nr_cpu_ids) {

				if (printk_ratelimit())

					printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n",

					       i, cpu);



				cpus_setall(desc->affinity);

				newcpu = any_online_cpu(desc->affinity);

				cpumask_setall(desc->affinity);

				newcpu = cpumask_any_and(desc->affinity,

							 cpu_online_mask);

			}



			route_irq(desc, i, newcpu);

arch/arm/oprofile/op_model_mpcore.c

+1 −1
Original line number Diff line number Diff line
@@ -263,7 +263,7 @@ static void em_route_irq(int irq, unsigned int cpu) 
	const struct cpumask *mask = cpumask_of(cpu);



	spin_lock_irq(&desc->lock);

	desc->affinity = *mask;

	cpumask_copy(desc->affinity, mask);

	desc->chip->set_affinity(irq, mask);

	spin_unlock_irq(&desc->lock);

}

arch/blackfin/kernel/irqchip.c

+5 −0
Original line number Diff line number Diff line
@@ -69,6 +69,11 @@ static struct irq_desc bad_irq_desc = { 
#endif

};



#ifdef CONFIG_CPUMASK_OFFSTACK

/* We are not allocating a variable-sized bad_irq_desc.affinity */

#error "Blackfin architecture does not support CONFIG_CPUMASK_OFFSTACK."

#endif



int show_interrupts(struct seq_file *p, void *v)

{

	int i = *(loff_t *) v, j;

arch/ia64/kernel/iosapic.c

+1 −1
Original line number Diff line number Diff line
@@ -880,7 +880,7 @@ iosapic_unregister_intr (unsigned int gsi) 
	if (iosapic_intr_info[irq].count == 0) {

#ifdef CONFIG_SMP

		/* Clear affinity */

		cpus_setall(idesc->affinity);

		cpumask_setall(idesc->affinity);

#endif

		/* Clear the interrupt information */

		iosapic_intr_info[irq].dest = 0;