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Commit e625ccec authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge branches 'pm-tools' and 'powercap' 

* pm-tools:
  tools: cpupower: Fix error when running cpupower monitor
  tools/power turbostat: fix typo on DRAM column in Joules-mode
  cpupower: Do not change the frequency of offline cpu
  tools/power turbostat: fix parameter passing for forked command
  tools/power turbostat: dump CONFIG_TDP
  tools/power turbostat: cpu0 is no longer hard-coded, so  update output
  tools/power turbostat: update turbostat(8)

* powercap:
  powercap / RAPL: disable the 2nd power limit properly
  powercap / RAPL: Add support for Broadwell-H
  powercap / RAPL: Add support for Skylake H/S
parents 56963d99 404c2db6 5021282c

arch/x86/include/asm/msr-index.h

+6 −0
Original line number Diff line number Diff line
@@ -170,6 +170,12 @@ 
#define MSR_PP1_ENERGY_STATUS		0x00000641

#define MSR_PP1_POLICY			0x00000642



#define MSR_CONFIG_TDP_NOMINAL		0x00000648

#define MSR_CONFIG_TDP_LEVEL_1		0x00000649

#define MSR_CONFIG_TDP_LEVEL_2		0x0000064A

#define MSR_CONFIG_TDP_CONTROL		0x0000064B

#define MSR_TURBO_ACTIVATION_RATIO	0x0000064C



#define MSR_PKG_WEIGHTED_CORE_C0_RES	0x00000658

#define MSR_PKG_ANY_CORE_C0_RES		0x00000659

#define MSR_PKG_ANY_GFXE_C0_RES		0x0000065A

drivers/powercap/intel_rapl.c

+6 −2
Original line number Diff line number Diff line
@@ -1096,11 +1096,13 @@ static const struct x86_cpu_id rapl_ids[] __initconst = { 
	RAPL_CPU(0x3f, rapl_defaults_hsw_server),/* Haswell servers */

	RAPL_CPU(0x4f, rapl_defaults_hsw_server),/* Broadwell servers */

	RAPL_CPU(0x45, rapl_defaults_core),/* Haswell ULT */

	RAPL_CPU(0x47, rapl_defaults_core),/* Broadwell-H */

	RAPL_CPU(0x4E, rapl_defaults_core),/* Skylake */

	RAPL_CPU(0x4C, rapl_defaults_cht),/* Braswell/Cherryview */

	RAPL_CPU(0x4A, rapl_defaults_tng),/* Tangier */

	RAPL_CPU(0x56, rapl_defaults_core),/* Future Xeon */

	RAPL_CPU(0x5A, rapl_defaults_ann),/* Annidale */

	RAPL_CPU(0x5E, rapl_defaults_core),/* Skylake-H/S */

	RAPL_CPU(0x57, rapl_defaults_hsw_server),/* Knights Landing */

	{}

};
@@ -1145,9 +1147,11 @@ static int rapl_unregister_powercap(void) 
			pr_debug("remove package, undo power limit on %d: %s\n",

				rp->id, rd->name);

			rapl_write_data_raw(rd, PL1_ENABLE, 0);

			rapl_write_data_raw(rd, PL2_ENABLE, 0);

			rapl_write_data_raw(rd, PL1_CLAMP, 0);

			if (find_nr_power_limit(rd) > 1) {

				rapl_write_data_raw(rd, PL2_ENABLE, 0);

				rapl_write_data_raw(rd, PL2_CLAMP, 0);

			}

			if (rd->id == RAPL_DOMAIN_PACKAGE) {

				rd_package = rd;

				continue;

tools/power/cpupower/utils/cpufreq-set.c

+4 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 


#include "cpufreq.h"

#include "helpers/helpers.h"

#include "helpers/sysfs.h"



#define NORM_FREQ_LEN 32
@@ -318,6 +319,9 @@ int cmd_freq_set(int argc, char **argv) 
		    cpufreq_cpu_exists(cpu))

			continue;



		if (sysfs_is_cpu_online(cpu) != 1)

			continue;



		printf(_("Setting cpu: %d\n"), cpu);

		ret = do_one_cpu(cpu, &new_pol, freq, policychange);

		if (ret) {

tools/power/cpupower/utils/helpers/topology.c

+2 −0
Original line number Diff line number Diff line
@@ -73,6 +73,8 @@ int get_cpu_topology(struct cpupower_topology *cpu_top) 
	for (cpu = 0; cpu < cpus; cpu++) {

		cpu_top->core_info[cpu].cpu = cpu;

		cpu_top->core_info[cpu].is_online = sysfs_is_cpu_online(cpu);

		if (!cpu_top->core_info[cpu].is_online)

			continue;

		if(sysfs_topology_read_file(

			cpu,

			"physical_package_id",

tools/power/x86/turbostat/turbostat.8

+0 −5
Original line number Diff line number Diff line
@@ -251,11 +251,6 @@ Although it is not guaranteed by the architecture, turbostat assumes 
that they count at TSC rate, which is true on all processors tested to date.



.SH REFERENCES

"Intel® Turbo Boost Technology

in Intel® Core™ Microarchitecture (Nehalem) Based Processors"

http://download.intel.com/design/processor/applnots/320354.pdf



"Intel® 64 and IA-32 Architectures Software Developer's Manual

Volume 3B: System Programming Guide"

http://www.intel.com/products/processor/manuals/