x86: enhance DEBUG_RODATA support - alternatives

#include <asm/mce.h>

#include <asm/nmi.h>

#include <asm/vsyscall.h>

#include <asm/cacheflush.h>

#include <asm/io.h>

#define MAX_PATCH_LEN (255-1)

#endif /* CONFIG_X86_64 */

/* Use this to add nops to a buffer, then text_poke the whole buffer. */

static void add_nops(void *insns, unsigned int len)

void add_nops(void *insns, unsigned int len)

{

	const unsigned char *const *noptable = find_nop_table();

		len -= noplen;

	}

}

EXPORT_SYMBOL_GPL(add_nops);

extern struct alt_instr __alt_instructions[], __alt_instructions_end[];

extern u8 *__smp_locks[], *__smp_locks_end[];

		memcpy(insnbuf, a->replacement, a->replacementlen);

		add_nops(insnbuf + a->replacementlen,

			 a->instrlen - a->replacementlen);

		text_poke(instr, insnbuf, a->instrlen);

		text_poke_early(instr, insnbuf, a->instrlen);

	}

}

				 void *text,  void *text_end)

{

	struct smp_alt_module *smp;

	unsigned long flags;

	if (noreplace_smp)

		return;

		__func__, smp->locks, smp->locks_end,

		smp->text, smp->text_end, smp->name);

	spin_lock_irqsave(&smp_alt, flags);

	spin_lock(&smp_alt);

	list_add_tail(&smp->next, &smp_alt_modules);

	if (boot_cpu_has(X86_FEATURE_UP))

		alternatives_smp_unlock(smp->locks, smp->locks_end,

					smp->text, smp->text_end);

	spin_unlock_irqrestore(&smp_alt, flags);

	spin_unlock(&smp_alt);

}

void alternatives_smp_module_del(struct module *mod)

{

	struct smp_alt_module *item;

	unsigned long flags;

	if (smp_alt_once || noreplace_smp)

		return;

	spin_lock_irqsave(&smp_alt, flags);

	spin_lock(&smp_alt);

	list_for_each_entry(item, &smp_alt_modules, next) {

		if (mod != item->mod)

			continue;

		list_del(&item->next);

		spin_unlock_irqrestore(&smp_alt, flags);

		spin_unlock(&smp_alt);

		DPRINTK("%s: %s\n", __func__, item->name);

		kfree(item);

		return;

	}

	spin_unlock_irqrestore(&smp_alt, flags);

	spin_unlock(&smp_alt);

}

void alternatives_smp_switch(int smp)

{

	struct smp_alt_module *mod;

	unsigned long flags;

#ifdef CONFIG_LOCKDEP

	/*

		return;

	BUG_ON(!smp && (num_online_cpus() > 1));

	spin_lock_irqsave(&smp_alt, flags);

	spin_lock(&smp_alt);

	/*

	 * Avoid unnecessary switches because it forces JIT based VMs to

						mod->text, mod->text_end);

	}

	smp_mode = smp;

	spin_unlock_irqrestore(&smp_alt, flags);

	spin_unlock(&smp_alt);

}

#endif

		/* Pad the rest with nops */

		add_nops(insnbuf + used, p->len - used);

		text_poke(p->instr, insnbuf, p->len);

		text_poke_early(p->instr, insnbuf, p->len);

	}

}

extern struct paravirt_patch_site __start_parainstructions[],

void __init alternative_instructions(void)

{

	unsigned long flags;

	/* The patching is not fully atomic, so try to avoid local interruptions

	   that might execute the to be patched code.

	   Other CPUs are not running. */

	stop_mce();

#endif

	local_irq_save(flags);

	apply_alternatives(__alt_instructions, __alt_instructions_end);

	/* switch to patch-once-at-boottime-only mode and free the

	}

#endif

 	apply_paravirt(__parainstructions, __parainstructions_end);

	local_irq_restore(flags);

	if (smp_alt_once)

		free_init_pages("SMP alternatives",

#endif

}

/*

 * Warning:

/**

 * text_poke_early - Update instructions on a live kernel at boot time

 * @addr: address to modify

 * @opcode: source of the copy

 * @len: length to copy

 *

 * When you use this code to patch more than one byte of an instruction

 * you need to make sure that other CPUs cannot execute this code in parallel.

 * Also no thread must be currently preempted in the middle of these instructions.

 * And on the local CPU you need to be protected again NMI or MCE handlers

 * seeing an inconsistent instruction while you patch.

 * Also no thread must be currently preempted in the middle of these

 * instructions. And on the local CPU you need to be protected again NMI or MCE

 * handlers seeing an inconsistent instruction while you patch.

 */

void __kprobes text_poke(void *addr, unsigned char *opcode, int len)

void *text_poke_early(void *addr, const void *opcode, size_t len)

{

	unsigned long flags;

	local_irq_save(flags);

	memcpy(addr, opcode, len);

	local_irq_restore(flags);

	sync_core();

	/* Could also do a CLFLUSH here to speed up CPU recovery; but

	   that causes hangs on some VIA CPUs. */

	return addr;

}

/**

 * text_poke - Update instructions on a live kernel

 * @addr: address to modify

 * @opcode: source of the copy

 * @len: length to copy

 *

 * Only atomic text poke/set should be allowed when not doing early patching.

 * It means the size must be writable atomically and the address must be aligned

 * in a way that permits an atomic write. It also makes sure we fit on a single

 * page.

 */

void *__kprobes text_poke(void *addr, const void *opcode, size_t len)

{

	unsigned long flags;

	char *vaddr;

	int nr_pages = 2;

	BUG_ON(len > sizeof(long));

	BUG_ON((((long)addr + len - 1) & ~(sizeof(long) - 1))

		- ((long)addr & ~(sizeof(long) - 1)));

	{

		struct page *pages[2] = { virt_to_page(addr),

			virt_to_page(addr + PAGE_SIZE) };

		if (!pages[1])

			nr_pages = 1;

		vaddr = vmap(pages, nr_pages, VM_MAP, PAGE_KERNEL);

		BUG_ON(!vaddr);

		local_irq_save(flags);

		memcpy(&vaddr[(unsigned long)addr & ~PAGE_MASK], opcode, len);

		local_irq_restore(flags);

		vunmap(vaddr);

	}

	sync_core();

	/* Could also do a CLFLUSH here to speed up CPU recovery; but

	   that causes hangs on some VIA CPUs. */

	return addr;

}

#define __parainstructions_end	NULL

#endif

extern void text_poke(void *addr, unsigned char *opcode, int len);

extern void add_nops(void *insns, unsigned int len);

/*

 * Clear and restore the kernel write-protection flag on the local CPU.

 * Allows the kernel to edit read-only pages.

 * Side-effect: any interrupt handler running between save and restore will have

 * the ability to write to read-only pages.

 *

 * Warning:

 * Code patching in the UP case is safe if NMIs and MCE handlers are stopped and

 * no thread can be preempted in the instructions being modified (no iret to an

 * invalid instruction possible) or if the instructions are changed from a

 * consistent state to another consistent state atomically.

 * More care must be taken when modifying code in the SMP case because of

 * Intel's errata.

 * On the local CPU you need to be protected again NMI or MCE handlers seeing an

 * inconsistent instruction while you patch.

 * The _early version expects the memory to already be RW.

 */

extern void *text_poke(void *addr, const void *opcode, size_t len);

extern void *text_poke_early(void *addr, const void *opcode, size_t len);

#endif /* _ASM_X86_ALTERNATIVE_H */