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Commit e4ea1c40 authored by Ivo van Doorn's avatar Ivo van Doorn Committed by John W. Linville
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rt2x00: Optimize configuration handling 



Implement latest changed from mac80211 configuration
handling to optmize configuration handling in rt2x00.

 * Remove set_retry_limit callback function, handled
   through config()
 * Move config_antenna to its own callback function,
   it isn't handled by mac80211 anymore
 * Use IEEE80211_CONF_CHANGED_* flags and remove manual
   checks
 * Removed deprecated short slot setting through config()
   and put it in config_erp() through which mac80211 now
   configures it
 * Remove config_phymode() and move contents to config_erp()
   since it only managed the basic rates which is now
   determined by mac80211 through config_erp().

Signed-off-by: default avatarIvo van Doorn <IvDoorn@gmail.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 3f64b435

drivers/net/wireless/rt2x00/rt2400pci.c

+80 −87
Original line number Diff line number Diff line
@@ -396,12 +396,74 @@ static void rt2400pci_config_erp(struct rt2x00_dev *rt2x00dev, 
	rt2x00_set_field32(&reg, ARCSR5_SERVICE, 0x84);

	rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 110));

	rt2x00pci_register_write(rt2x00dev, ARCSR5, reg);



	rt2x00pci_register_write(rt2x00dev, ARCSR1, erp->basic_rates);



	rt2x00pci_register_read(rt2x00dev, CSR11, &reg);

	rt2x00_set_field32(&reg, CSR11_SLOT_TIME, erp->slot_time);

	rt2x00pci_register_write(rt2x00dev, CSR11, reg);



	rt2x00pci_register_read(rt2x00dev, CSR18, &reg);

	rt2x00_set_field32(&reg, CSR18_SIFS, erp->sifs);

	rt2x00_set_field32(&reg, CSR18_PIFS, erp->pifs);

	rt2x00pci_register_write(rt2x00dev, CSR18, reg);



	rt2x00pci_register_read(rt2x00dev, CSR19, &reg);

	rt2x00_set_field32(&reg, CSR19_DIFS, erp->difs);

	rt2x00_set_field32(&reg, CSR19_EIFS, erp->eifs);

	rt2x00pci_register_write(rt2x00dev, CSR19, reg);

}



static void rt2400pci_config_phymode(struct rt2x00_dev *rt2x00dev,

				     const int basic_rate_mask)

static void rt2400pci_config_ant(struct rt2x00_dev *rt2x00dev,

				 struct antenna_setup *ant)

{

	rt2x00pci_register_write(rt2x00dev, ARCSR1, basic_rate_mask);

	u8 r1;

	u8 r4;



	/*

	 * We should never come here because rt2x00lib is supposed

	 * to catch this and send us the correct antenna explicitely.

	 */

	BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||

	       ant->tx == ANTENNA_SW_DIVERSITY);



	rt2400pci_bbp_read(rt2x00dev, 4, &r4);

	rt2400pci_bbp_read(rt2x00dev, 1, &r1);



	/*

	 * Configure the TX antenna.

	 */

	switch (ant->tx) {

	case ANTENNA_HW_DIVERSITY:

		rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 1);

		break;

	case ANTENNA_A:

		rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 0);

		break;

	case ANTENNA_B:

	default:

		rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 2);

		break;

	}



	/*

	 * Configure the RX antenna.

	 */

	switch (ant->rx) {

	case ANTENNA_HW_DIVERSITY:

		rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);

		break;

	case ANTENNA_A:

		rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 0);

		break;

	case ANTENNA_B:

	default:

		rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);

		break;

	}



	rt2400pci_bbp_write(rt2x00dev, 4, r4);

	rt2400pci_bbp_write(rt2x00dev, 1, r1);

}



static void rt2400pci_config_channel(struct rt2x00_dev *rt2x00dev,
@@ -460,56 +522,17 @@ static void rt2400pci_config_txpower(struct rt2x00_dev *rt2x00dev, int txpower) 
	rt2400pci_bbp_write(rt2x00dev, 3, TXPOWER_TO_DEV(txpower));

}



static void rt2400pci_config_antenna(struct rt2x00_dev *rt2x00dev,

				     struct antenna_setup *ant)

static void rt2400pci_config_retry_limit(struct rt2x00_dev *rt2x00dev,

					 struct rt2x00lib_conf *libconf)

{

	u8 r1;

	u8 r4;



	/*

	 * We should never come here because rt2x00lib is supposed

	 * to catch this and send us the correct antenna explicitely.

	 */

	BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||

	       ant->tx == ANTENNA_SW_DIVERSITY);



	rt2400pci_bbp_read(rt2x00dev, 4, &r4);

	rt2400pci_bbp_read(rt2x00dev, 1, &r1);



	/*

	 * Configure the TX antenna.

	 */

	switch (ant->tx) {

	case ANTENNA_HW_DIVERSITY:

		rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 1);

		break;

	case ANTENNA_A:

		rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 0);

		break;

	case ANTENNA_B:

	default:

		rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 2);

		break;

	}



	/*

	 * Configure the RX antenna.

	 */

	switch (ant->rx) {

	case ANTENNA_HW_DIVERSITY:

		rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);

		break;

	case ANTENNA_A:

		rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 0);

		break;

	case ANTENNA_B:

	default:

		rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);

		break;

	}

	u32 reg;



	rt2400pci_bbp_write(rt2x00dev, 4, r4);

	rt2400pci_bbp_write(rt2x00dev, 1, r1);

	rt2x00pci_register_read(rt2x00dev, CSR11, &reg);

	rt2x00_set_field32(&reg, CSR11_LONG_RETRY,

			   libconf->conf->long_frame_max_tx_count);

	rt2x00_set_field32(&reg, CSR11_SHORT_RETRY,

			   libconf->conf->short_frame_max_tx_count);

	rt2x00pci_register_write(rt2x00dev, CSR11, reg);

}



static void rt2400pci_config_duration(struct rt2x00_dev *rt2x00dev,
@@ -517,20 +540,6 @@ static void rt2400pci_config_duration(struct rt2x00_dev *rt2x00dev, 
{

	u32 reg;



	rt2x00pci_register_read(rt2x00dev, CSR11, &reg);

	rt2x00_set_field32(&reg, CSR11_SLOT_TIME, libconf->slot_time);

	rt2x00pci_register_write(rt2x00dev, CSR11, reg);



	rt2x00pci_register_read(rt2x00dev, CSR18, &reg);

	rt2x00_set_field32(&reg, CSR18_SIFS, libconf->sifs);

	rt2x00_set_field32(&reg, CSR18_PIFS, libconf->pifs);

	rt2x00pci_register_write(rt2x00dev, CSR18, reg);



	rt2x00pci_register_read(rt2x00dev, CSR19, &reg);

	rt2x00_set_field32(&reg, CSR19_DIFS, libconf->difs);

	rt2x00_set_field32(&reg, CSR19_EIFS, libconf->eifs);

	rt2x00pci_register_write(rt2x00dev, CSR19, reg);



	rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg);

	rt2x00_set_field32(&reg, TXCSR1_TSF_OFFSET, IEEE80211_HEADER);

	rt2x00_set_field32(&reg, TXCSR1_AUTORESPONDER, 1);
@@ -548,16 +557,14 @@ static void rt2400pci_config(struct rt2x00_dev *rt2x00dev, 
			     struct rt2x00lib_conf *libconf,

			     const unsigned int flags)

{

	if (flags & CONFIG_UPDATE_PHYMODE)

		rt2400pci_config_phymode(rt2x00dev, libconf->basic_rates);

	if (flags & CONFIG_UPDATE_CHANNEL)

	if (flags & IEEE80211_CONF_CHANGE_CHANNEL)

		rt2400pci_config_channel(rt2x00dev, &libconf->rf);

	if (flags & CONFIG_UPDATE_TXPOWER)

	if (flags & IEEE80211_CONF_CHANGE_POWER)

		rt2400pci_config_txpower(rt2x00dev,

					 libconf->conf->power_level);

	if (flags & CONFIG_UPDATE_ANTENNA)

		rt2400pci_config_antenna(rt2x00dev, &libconf->ant);

	if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))

	if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)

		rt2400pci_config_retry_limit(rt2x00dev, libconf);

	if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)

		rt2400pci_config_duration(rt2x00dev, libconf);

}
@@ -1502,20 +1509,6 @@ static int rt2400pci_probe_hw(struct rt2x00_dev *rt2x00dev) 
/*

 * IEEE80211 stack callback functions.

 */

static int rt2400pci_set_retry_limit(struct ieee80211_hw *hw,

				     u32 short_retry, u32 long_retry)

{

	struct rt2x00_dev *rt2x00dev = hw->priv;

	u32 reg;



	rt2x00pci_register_read(rt2x00dev, CSR11, &reg);

	rt2x00_set_field32(&reg, CSR11_LONG_RETRY, long_retry);

	rt2x00_set_field32(&reg, CSR11_SHORT_RETRY, short_retry);

	rt2x00pci_register_write(rt2x00dev, CSR11, reg);



	return 0;

}



static int rt2400pci_conf_tx(struct ieee80211_hw *hw, u16 queue,

			     const struct ieee80211_tx_queue_params *params)

{
@@ -1601,8 +1594,8 @@ static const struct rt2x00lib_ops rt2400pci_rt2x00_ops = { 
	.config_filter		= rt2400pci_config_filter,

	.config_intf		= rt2400pci_config_intf,

	.config_erp		= rt2400pci_config_erp,

	.config_ant		= rt2400pci_config_ant,

	.config			= rt2400pci_config,

	.set_retry_limit	= rt2400pci_set_retry_limit,

};



static const struct data_queue_desc rt2400pci_queue_rx = {

drivers/net/wireless/rt2x00/rt2500pci.c

+100 −106
Original line number Diff line number Diff line
@@ -402,12 +402,94 @@ static void rt2500pci_config_erp(struct rt2x00_dev *rt2x00dev, 
	rt2x00_set_field32(&reg, ARCSR5_SERVICE, 0x84);

	rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 110));

	rt2x00pci_register_write(rt2x00dev, ARCSR5, reg);



	rt2x00pci_register_write(rt2x00dev, ARCSR1, erp->basic_rates);



	rt2x00pci_register_read(rt2x00dev, CSR11, &reg);

	rt2x00_set_field32(&reg, CSR11_SLOT_TIME, erp->slot_time);

	rt2x00pci_register_write(rt2x00dev, CSR11, reg);



	rt2x00pci_register_read(rt2x00dev, CSR18, &reg);

	rt2x00_set_field32(&reg, CSR18_SIFS, erp->sifs);

	rt2x00_set_field32(&reg, CSR18_PIFS, erp->pifs);

	rt2x00pci_register_write(rt2x00dev, CSR18, reg);



	rt2x00pci_register_read(rt2x00dev, CSR19, &reg);

	rt2x00_set_field32(&reg, CSR19_DIFS, erp->difs);

	rt2x00_set_field32(&reg, CSR19_EIFS, erp->eifs);

	rt2x00pci_register_write(rt2x00dev, CSR19, reg);

}



static void rt2500pci_config_phymode(struct rt2x00_dev *rt2x00dev,

				     const int basic_rate_mask)

static void rt2500pci_config_ant(struct rt2x00_dev *rt2x00dev,

				 struct antenna_setup *ant)

{

	rt2x00pci_register_write(rt2x00dev, ARCSR1, basic_rate_mask);

	u32 reg;

	u8 r14;

	u8 r2;



	/*

	 * We should never come here because rt2x00lib is supposed

	 * to catch this and send us the correct antenna explicitely.

	 */

	BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||

	       ant->tx == ANTENNA_SW_DIVERSITY);



	rt2x00pci_register_read(rt2x00dev, BBPCSR1, &reg);

	rt2500pci_bbp_read(rt2x00dev, 14, &r14);

	rt2500pci_bbp_read(rt2x00dev, 2, &r2);



	/*

	 * Configure the TX antenna.

	 */

	switch (ant->tx) {

	case ANTENNA_A:

		rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);

		rt2x00_set_field32(&reg, BBPCSR1_CCK, 0);

		rt2x00_set_field32(&reg, BBPCSR1_OFDM, 0);

		break;

	case ANTENNA_B:

	default:

		rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);

		rt2x00_set_field32(&reg, BBPCSR1_CCK, 2);

		rt2x00_set_field32(&reg, BBPCSR1_OFDM, 2);

		break;

	}



	/*

	 * Configure the RX antenna.

	 */

	switch (ant->rx) {

	case ANTENNA_A:

		rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);

		break;

	case ANTENNA_B:

	default:

		rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);

		break;

	}



	/*

	 * RT2525E and RT5222 need to flip TX I/Q

	 */

	if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||

	    rt2x00_rf(&rt2x00dev->chip, RF5222)) {

		rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);

		rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 1);

		rt2x00_set_field32(&reg, BBPCSR1_OFDM_FLIP, 1);



		/*

		 * RT2525E does not need RX I/Q Flip.

		 */

		if (rt2x00_rf(&rt2x00dev->chip, RF2525E))

			rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);

	} else {

		rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 0);

		rt2x00_set_field32(&reg, BBPCSR1_OFDM_FLIP, 0);

	}



	rt2x00pci_register_write(rt2x00dev, BBPCSR1, reg);

	rt2500pci_bbp_write(rt2x00dev, 14, r14);

	rt2500pci_bbp_write(rt2x00dev, 2, r2);

}



static void rt2500pci_config_channel(struct rt2x00_dev *rt2x00dev,
@@ -489,76 +571,17 @@ static void rt2500pci_config_txpower(struct rt2x00_dev *rt2x00dev, 
	rt2500pci_rf_write(rt2x00dev, 3, rf3);

}



static void rt2500pci_config_antenna(struct rt2x00_dev *rt2x00dev,

				     struct antenna_setup *ant)

static void rt2500pci_config_retry_limit(struct rt2x00_dev *rt2x00dev,

					 struct rt2x00lib_conf *libconf)

{

	u32 reg;

	u8 r14;

	u8 r2;



	/*

	 * We should never come here because rt2x00lib is supposed

	 * to catch this and send us the correct antenna explicitely.

	 */

	BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||

	       ant->tx == ANTENNA_SW_DIVERSITY);



	rt2x00pci_register_read(rt2x00dev, BBPCSR1, &reg);

	rt2500pci_bbp_read(rt2x00dev, 14, &r14);

	rt2500pci_bbp_read(rt2x00dev, 2, &r2);



	/*

	 * Configure the TX antenna.

	 */

	switch (ant->tx) {

	case ANTENNA_A:

		rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);

		rt2x00_set_field32(&reg, BBPCSR1_CCK, 0);

		rt2x00_set_field32(&reg, BBPCSR1_OFDM, 0);

		break;

	case ANTENNA_B:

	default:

		rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);

		rt2x00_set_field32(&reg, BBPCSR1_CCK, 2);

		rt2x00_set_field32(&reg, BBPCSR1_OFDM, 2);

		break;

	}



	/*

	 * Configure the RX antenna.

	 */

	switch (ant->rx) {

	case ANTENNA_A:

		rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);

		break;

	case ANTENNA_B:

	default:

		rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);

		break;

	}



	/*

	 * RT2525E and RT5222 need to flip TX I/Q

	 */

	if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||

	    rt2x00_rf(&rt2x00dev->chip, RF5222)) {

		rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);

		rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 1);

		rt2x00_set_field32(&reg, BBPCSR1_OFDM_FLIP, 1);



		/*

		 * RT2525E does not need RX I/Q Flip.

		 */

		if (rt2x00_rf(&rt2x00dev->chip, RF2525E))

			rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);

	} else {

		rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 0);

		rt2x00_set_field32(&reg, BBPCSR1_OFDM_FLIP, 0);

	}



	rt2x00pci_register_write(rt2x00dev, BBPCSR1, reg);

	rt2500pci_bbp_write(rt2x00dev, 14, r14);

	rt2500pci_bbp_write(rt2x00dev, 2, r2);

	rt2x00pci_register_read(rt2x00dev, CSR11, &reg);

	rt2x00_set_field32(&reg, CSR11_LONG_RETRY,

			   libconf->conf->long_frame_max_tx_count);

	rt2x00_set_field32(&reg, CSR11_SHORT_RETRY,

			   libconf->conf->short_frame_max_tx_count);

	rt2x00pci_register_write(rt2x00dev, CSR11, reg);

}



static void rt2500pci_config_duration(struct rt2x00_dev *rt2x00dev,
@@ -566,20 +589,6 @@ static void rt2500pci_config_duration(struct rt2x00_dev *rt2x00dev, 
{

	u32 reg;



	rt2x00pci_register_read(rt2x00dev, CSR11, &reg);

	rt2x00_set_field32(&reg, CSR11_SLOT_TIME, libconf->slot_time);

	rt2x00pci_register_write(rt2x00dev, CSR11, reg);



	rt2x00pci_register_read(rt2x00dev, CSR18, &reg);

	rt2x00_set_field32(&reg, CSR18_SIFS, libconf->sifs);

	rt2x00_set_field32(&reg, CSR18_PIFS, libconf->pifs);

	rt2x00pci_register_write(rt2x00dev, CSR18, reg);



	rt2x00pci_register_read(rt2x00dev, CSR19, &reg);

	rt2x00_set_field32(&reg, CSR19_DIFS, libconf->difs);

	rt2x00_set_field32(&reg, CSR19_EIFS, libconf->eifs);

	rt2x00pci_register_write(rt2x00dev, CSR19, reg);



	rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg);

	rt2x00_set_field32(&reg, TXCSR1_TSF_OFFSET, IEEE80211_HEADER);

	rt2x00_set_field32(&reg, TXCSR1_AUTORESPONDER, 1);
@@ -597,17 +606,16 @@ static void rt2500pci_config(struct rt2x00_dev *rt2x00dev, 
			     struct rt2x00lib_conf *libconf,

			     const unsigned int flags)

{

	if (flags & CONFIG_UPDATE_PHYMODE)

		rt2500pci_config_phymode(rt2x00dev, libconf->basic_rates);

	if (flags & CONFIG_UPDATE_CHANNEL)

	if (flags & IEEE80211_CONF_CHANGE_CHANNEL)

		rt2500pci_config_channel(rt2x00dev, &libconf->rf,

					 libconf->conf->power_level);

	if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))

	if ((flags & IEEE80211_CONF_CHANGE_POWER) &&

	    !(flags & IEEE80211_CONF_CHANGE_CHANNEL))

		rt2500pci_config_txpower(rt2x00dev,

					 libconf->conf->power_level);

	if (flags & CONFIG_UPDATE_ANTENNA)

		rt2500pci_config_antenna(rt2x00dev, &libconf->ant);

	if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))

	if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)

		rt2500pci_config_retry_limit(rt2x00dev, libconf);

	if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)

		rt2500pci_config_duration(rt2x00dev, libconf);

}
@@ -1827,20 +1835,6 @@ static int rt2500pci_probe_hw(struct rt2x00_dev *rt2x00dev) 
/*

 * IEEE80211 stack callback functions.

 */

static int rt2500pci_set_retry_limit(struct ieee80211_hw *hw,

				     u32 short_retry, u32 long_retry)

{

	struct rt2x00_dev *rt2x00dev = hw->priv;

	u32 reg;



	rt2x00pci_register_read(rt2x00dev, CSR11, &reg);

	rt2x00_set_field32(&reg, CSR11_LONG_RETRY, long_retry);

	rt2x00_set_field32(&reg, CSR11_SHORT_RETRY, short_retry);

	rt2x00pci_register_write(rt2x00dev, CSR11, reg);



	return 0;

}



static u64 rt2500pci_get_tsf(struct ieee80211_hw *hw)

{

	struct rt2x00_dev *rt2x00dev = hw->priv;
@@ -1901,8 +1895,8 @@ static const struct rt2x00lib_ops rt2500pci_rt2x00_ops = { 
	.config_filter		= rt2500pci_config_filter,

	.config_intf		= rt2500pci_config_intf,

	.config_erp		= rt2500pci_config_erp,

	.config_ant		= rt2500pci_config_ant,

	.config			= rt2500pci_config,

	.set_retry_limit	= rt2500pci_set_retry_limit,

};



static const struct data_queue_desc rt2500pci_queue_rx = {

drivers/net/wireless/rt2x00/rt2500usb.c

+52 −58
Original line number Diff line number Diff line
@@ -423,56 +423,15 @@ static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev, 
	rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,

			   !!erp->short_preamble);

	rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);

}



static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,

				     const int basic_rate_mask)

{

	rt2500usb_register_write(rt2x00dev, TXRX_CSR11, basic_rate_mask);

}



static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,

				     struct rf_channel *rf, const int txpower)

{

	/*

	 * Set TXpower.

	 */

	rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));



	/*

	 * For RT2525E we should first set the channel to half band higher.

	 */

	if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {

		static const u32 vals[] = {

			0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,

			0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,

			0x000008ba, 0x000008be, 0x000008b7, 0x00000902,

			0x00000902, 0x00000906

		};



		rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);

		if (rf->rf4)

			rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);

	}

	rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates);



	rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);

	rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);

	rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);

	if (rf->rf4)

		rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);

}



static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,

				     const int txpower)

{

	u32 rf3;



	rt2x00_rf_read(rt2x00dev, 3, &rf3);

	rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));

	rt2500usb_rf_write(rt2x00dev, 3, rf3);

	rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);

	rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);

	rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);

}



static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,

static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,

				 struct antenna_setup *ant)

{

	u8 r2;
@@ -555,15 +514,52 @@ static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev, 
	rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);

}



static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,

				     struct rf_channel *rf, const int txpower)

{

	/*

	 * Set TXpower.

	 */

	rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));



	/*

	 * For RT2525E we should first set the channel to half band higher.

	 */

	if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {

		static const u32 vals[] = {

			0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,

			0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,

			0x000008ba, 0x000008be, 0x000008b7, 0x00000902,

			0x00000902, 0x00000906

		};



		rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);

		if (rf->rf4)

			rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);

	}



	rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);

	rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);

	rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);

	if (rf->rf4)

		rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);

}



static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,

				     const int txpower)

{

	u32 rf3;



	rt2x00_rf_read(rt2x00dev, 3, &rf3);

	rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));

	rt2500usb_rf_write(rt2x00dev, 3, rf3);

}



static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,

				      struct rt2x00lib_conf *libconf)

{

	u16 reg;



	rt2500usb_register_write(rt2x00dev, MAC_CSR10, libconf->slot_time);

	rt2500usb_register_write(rt2x00dev, MAC_CSR11, libconf->sifs);

	rt2500usb_register_write(rt2x00dev, MAC_CSR12, libconf->eifs);



	rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);

	rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,

			   libconf->conf->beacon_int * 4);
@@ -574,17 +570,14 @@ static void rt2500usb_config(struct rt2x00_dev *rt2x00dev, 
			     struct rt2x00lib_conf *libconf,

			     const unsigned int flags)

{

	if (flags & CONFIG_UPDATE_PHYMODE)

		rt2500usb_config_phymode(rt2x00dev, libconf->basic_rates);

	if (flags & CONFIG_UPDATE_CHANNEL)

	if (flags & IEEE80211_CONF_CHANGE_CHANNEL)

		rt2500usb_config_channel(rt2x00dev, &libconf->rf,

					 libconf->conf->power_level);

	if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))

	if ((flags & IEEE80211_CONF_CHANGE_POWER) &&

	    !(flags & IEEE80211_CONF_CHANGE_CHANNEL))

		rt2500usb_config_txpower(rt2x00dev,

					 libconf->conf->power_level);

	if (flags & CONFIG_UPDATE_ANTENNA)

		rt2500usb_config_antenna(rt2x00dev, &libconf->ant);

	if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))

	if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)

		rt2500usb_config_duration(rt2x00dev, libconf);

}
@@ -1794,6 +1787,7 @@ static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = { 
	.config_filter		= rt2500usb_config_filter,

	.config_intf		= rt2500usb_config_intf,

	.config_erp		= rt2500usb_config_erp,

	.config_ant		= rt2500usb_config_ant,

	.config			= rt2500usb_config,

};

drivers/net/wireless/rt2x00/rt2x00.h

+12 −23
Original line number Diff line number Diff line
@@ -433,18 +433,6 @@ struct rt2x00lib_conf { 


	struct rf_channel rf;

	struct channel_info channel;



	struct antenna_setup ant;



	enum ieee80211_band band;



	u32 basic_rates;

	u32 slot_time;



	short sifs;

	short pifs;

	short difs;

	short eifs;

};



/*
@@ -456,6 +444,15 @@ struct rt2x00lib_erp { 


	int ack_timeout;

	int ack_consume_time;



	u64 basic_rates;



	int slot_time;



	short sifs;

	short pifs;

	short difs;

	short eifs;

};



/*
@@ -589,19 +586,11 @@ struct rt2x00lib_ops { 


	void (*config_erp) (struct rt2x00_dev *rt2x00dev,

			    struct rt2x00lib_erp *erp);

	void (*config_ant) (struct rt2x00_dev *rt2x00dev,

			    struct antenna_setup *ant);

	void (*config) (struct rt2x00_dev *rt2x00dev,

			struct rt2x00lib_conf *libconf,

			const unsigned int flags);

#define CONFIG_UPDATE_PHYMODE		( 1 << 1 )

#define CONFIG_UPDATE_CHANNEL		( 1 << 2 )

#define CONFIG_UPDATE_TXPOWER		( 1 << 3 )

#define CONFIG_UPDATE_ANTENNA		( 1 << 4 )

#define CONFIG_UPDATE_SLOT_TIME 	( 1 << 5 )

#define CONFIG_UPDATE_BEACON_INT	( 1 << 6 )

#define CONFIG_UPDATE_ALL		0xffff



	int (*set_retry_limit) (struct ieee80211_hw *hw,

				u32 short_limit, u32 long_limit);

			const unsigned int changed_flags);

};



/*

drivers/net/wireless/rt2x00/rt2x00config.c

+24 −140

File changed.

Preview size limit exceeded, changes collapsed.