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Commit e479ed43 authored by Kalle Valo's avatar Kalle Valo
Browse files

ath10k: convert ath10k_pci_reg_read/write32() to take struct ath10k 



This is consistent with all other functions.

Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
parent aa5c1db4

drivers/net/wireless/ath/ath10k/pci.c

+7 −12
Original line number Diff line number Diff line
@@ -2323,18 +2323,13 @@ static int ath10k_pci_reset_target(struct ath10k *ar) 


static void ath10k_pci_device_reset(struct ath10k *ar)

{

	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);

	void __iomem *mem = ar_pci->mem;

	int i;

	u32 val;



	if (!SOC_GLOBAL_RESET_ADDRESS)

		return;



	if (!mem)

		return;



	ath10k_pci_reg_write32(mem, PCIE_SOC_WAKE_ADDRESS,

	ath10k_pci_reg_write32(ar, PCIE_SOC_WAKE_ADDRESS,

			       PCIE_SOC_WAKE_V_MASK);

	for (i = 0; i < ATH_PCI_RESET_WAIT_MAX; i++) {

		if (ath10k_pci_target_is_awake(ar))
@@ -2343,12 +2338,12 @@ static void ath10k_pci_device_reset(struct ath10k *ar) 
	}



	/* Put Target, including PCIe, into RESET. */

	val = ath10k_pci_reg_read32(mem, SOC_GLOBAL_RESET_ADDRESS);

	val = ath10k_pci_reg_read32(ar, SOC_GLOBAL_RESET_ADDRESS);

	val |= 1;

	ath10k_pci_reg_write32(mem, SOC_GLOBAL_RESET_ADDRESS, val);

	ath10k_pci_reg_write32(ar, SOC_GLOBAL_RESET_ADDRESS, val);



	for (i = 0; i < ATH_PCI_RESET_WAIT_MAX; i++) {

		if (ath10k_pci_reg_read32(mem, RTC_STATE_ADDRESS) &

		if (ath10k_pci_reg_read32(ar, RTC_STATE_ADDRESS) &

					  RTC_STATE_COLD_RESET_MASK)

			break;

		msleep(1);
@@ -2356,16 +2351,16 @@ static void ath10k_pci_device_reset(struct ath10k *ar) 


	/* Pull Target, including PCIe, out of RESET. */

	val &= ~1;

	ath10k_pci_reg_write32(mem, SOC_GLOBAL_RESET_ADDRESS, val);

	ath10k_pci_reg_write32(ar, SOC_GLOBAL_RESET_ADDRESS, val);



	for (i = 0; i < ATH_PCI_RESET_WAIT_MAX; i++) {

		if (!(ath10k_pci_reg_read32(mem, RTC_STATE_ADDRESS) &

		if (!(ath10k_pci_reg_read32(ar, RTC_STATE_ADDRESS) &

					    RTC_STATE_COLD_RESET_MASK))

			break;

		msleep(1);

	}



	ath10k_pci_reg_write32(mem, PCIE_SOC_WAKE_ADDRESS, PCIE_SOC_WAKE_RESET);

	ath10k_pci_reg_write32(ar, PCIE_SOC_WAKE_ADDRESS, PCIE_SOC_WAKE_RESET);

}



static void ath10k_pci_dump_features(struct ath10k_pci *ar_pci)

drivers/net/wireless/ath/ath10k/pci.h

+8 −4
Original line number Diff line number Diff line
@@ -240,14 +240,18 @@ static inline struct ath10k_pci *ath10k_pci_priv(struct ath10k *ar) 
	return ar->hif.priv;

}



static inline u32 ath10k_pci_reg_read32(void __iomem *mem, u32 addr)

static inline u32 ath10k_pci_reg_read32(struct ath10k *ar, u32 addr)

{

	return ioread32(mem + PCIE_LOCAL_BASE_ADDRESS + addr);

	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);



	return ioread32(ar_pci->mem + PCIE_LOCAL_BASE_ADDRESS + addr);

}



static inline void ath10k_pci_reg_write32(void __iomem *mem, u32 addr, u32 val)

static inline void ath10k_pci_reg_write32(struct ath10k *ar, u32 addr, u32 val)

{

	iowrite32(val, mem + PCIE_LOCAL_BASE_ADDRESS + addr);

	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);



	iowrite32(val, ar_pci->mem + PCIE_LOCAL_BASE_ADDRESS + addr);

}



#define ATH_PCI_RESET_WAIT_MAX 10 /* ms */