Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit e454b359 authored by Magnus Damm's avatar Magnus Damm Committed by Simon Horman
Browse files

devicetree: bindings: Renesas APMU and SMP Enable method 



Add DT binding documentation for the APMU hardware and add "renesas,apmu"
to the list of enable methods for the ARM cpus.

Signed-off-by: default avatarMagnus Damm <damm+renesas@opensource.se>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: default avatarRob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 54389e98

Documentation/devicetree/bindings/arm/cpus.txt

+1 −0
Original line number Diff line number Diff line
@@ -204,6 +204,7 @@ nodes to be present and contain the properties described below. 
			    "qcom,gcc-msm8660"

			    "qcom,kpss-acc-v1"

			    "qcom,kpss-acc-v2"

			    "renesas,apmu"

			    "rockchip,rk3036-smp"

			    "rockchip,rk3066-smp"

			    "ste,dbx500-smp"

Documentation/devicetree/bindings/power/renesas,apmu.txt

0 → 100644
+31 −0
Original line number Diff line number Diff line 
DT bindings for the Renesas Advanced Power Management Unit



Renesas R-Car line of SoCs utilize one or more APMU hardware units

for CPU core power domain control including SMP boot and CPU Hotplug.



Required properties:



- compatible: Should be "renesas,<soctype>-apmu", "renesas,apmu" as fallback.

	      Examples with soctypes are:

		- "renesas,r8a7790-apmu" (R-Car H2)

		- "renesas,r8a7791-apmu" (R-Car M2-W)

		- "renesas,r8a7792-apmu" (R-Car V2H)

		- "renesas,r8a7793-apmu" (R-Car M2-N)

		- "renesas,r8a7794-apmu" (R-Car E2)



- reg: Base address and length of the I/O registers used by the APMU.



- cpus: This node contains a list of CPU cores, which should match the order

  of CPU cores used by the WUPCR and PSTR registers in the Advanced Power

  Management Unit section of the device's datasheet.





Example:



This shows the r8a7791 APMU that can control CPU0 and CPU1.



	apmu@e6152000 {

		compatible = "renesas,r8a7791-apmu", "renesas,apmu";

		reg = <0 0xe6152000 0 0x188>;

		cpus = <&cpu0 &cpu1>;

	};