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Commit e3dff585 authored by Ben Widawsky's avatar Ben Widawsky Committed by Daniel Vetter
Browse files

drm/i915: Implement WaSwitchSolVfFArbitrationPriority 



Bspec mentions this for HSW+. I can't quite tell what the effects are,
and I don't easily have a way to test this.

Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 96b219fa

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -121,6 +121,7 @@ 


#define GAM_ECOCHK			0x4090

#define   ECOCHK_SNB_BIT		(1<<10)

#define   HSW_ECOCHK_ARB_PRIO_SOL	(1<<6)

#define   ECOCHK_PPGTT_CACHE64B		(0x3<<3)

#define   ECOCHK_PPGTT_CACHE4B		(0x0<<3)

drivers/gpu/drm/i915/intel_pm.c

+3 −0
Original line number Diff line number Diff line
@@ -3770,6 +3770,9 @@ static void haswell_init_clock_gating(struct drm_device *dev) 
	I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |

		   GEN6_MBCTL_ENABLE_BOOT_FETCH);



	/* WaSwitchSolVfFArbitrationPriority */

	I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | HSW_ECOCHK_ARB_PRIO_SOL);



	/* XXX: This is a workaround for early silicon revisions and should be

	 * removed later.

	 */