Commit e3c33578 authored Nov 02, 2013 by Damien Lespiau Committed by Daniel Vetter Nov 08, 2013

drm/i915/bdw: Broadwell has a max port clock of 300Mhz on HDMI



Just like HSW.

This means we can scan out a mode with a 300Mhz pixel clock with a depth
of 24 bits, but only a 200Mhz one with a 36bits depth.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

parent 0f161f70

drivers/gpu/drm/i915/intel_hdmi.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -847,7 +847,7 @@ static int hdmi_portclock_limit(struct intel_hdmi *hdmi)

		if (IS_G4X(dev))
		return 165000;
		else if (IS_HASWELL(dev))
		else if (IS_HASWELL(dev) \|\| INTEL_INFO(dev)->gen >= 8)
		return 300000;
		else
		return 225000;