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Commit e2e3c57b authored by Tomas Winkler's avatar Tomas Winkler Committed by John W. Linville
Browse files

iwlwifi: move iwl4965_set_pwr_src to iwl4965-base.c 



This patch moves iwl4965_set_pwr_src to iwl4965-base.c.

Signed-off-by: default avatarTomas Winkler <tomas.winkler@intel.com>
Signed-off-by: default avatarZhu Yi <yi.zhu@intel.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 4bf64efd

drivers/net/wireless/iwlwifi/iwl-4965.c

+0 −33
Original line number Diff line number Diff line
@@ -341,39 +341,6 @@ static int iwl4965_eeprom_check_version(struct iwl_priv *priv) 
	return -EINVAL;



}

int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)

{

	int ret;

	unsigned long flags;



	spin_lock_irqsave(&priv->lock, flags);

	ret = iwl_grab_nic_access(priv);

	if (ret) {

		spin_unlock_irqrestore(&priv->lock, flags);

		return ret;

	}



	if (src == IWL_PWR_SRC_VAUX) {

		u32 val;

		ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,

					    &val);



		if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {

			iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,

					       APMG_PS_CTRL_VAL_PWR_SRC_VAUX,

					       ~APMG_PS_CTRL_MSK_PWR_SRC);

		}

	} else {

		iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,

				       APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,

				       ~APMG_PS_CTRL_MSK_PWR_SRC);

	}



	iwl_release_nic_access(priv);

	spin_unlock_irqrestore(&priv->lock, flags);



	return ret;

}



/*

 * Activate/Deactivat Tx DMA/FIFO channels according tx fifos mask

drivers/net/wireless/iwlwifi/iwl4965-base.c

+31 −0
Original line number Diff line number Diff line
@@ -1262,6 +1262,37 @@ static void iwl4965_rx_card_state_notif(struct iwl_priv *priv, 
		wake_up_interruptible(&priv->wait_command_queue);

}



int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)

{

	int ret;

	unsigned long flags;



	spin_lock_irqsave(&priv->lock, flags);

	ret = iwl_grab_nic_access(priv);

	if (ret)

		goto err;



	if (src == IWL_PWR_SRC_VAUX) {

		u32 val;

		ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,

					    &val);



		if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)

			iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,

					       APMG_PS_CTRL_VAL_PWR_SRC_VAUX,

					       ~APMG_PS_CTRL_MSK_PWR_SRC);

	} else {

		iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,

				       APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,

				       ~APMG_PS_CTRL_MSK_PWR_SRC);

	}



	iwl_release_nic_access(priv);

err:

	spin_unlock_irqrestore(&priv->lock, flags);

	return ret;

}



/**

 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks

 *