Commit e1ffceb0 authored Aug 19, 2015 by Lucas Stach Committed by Shawn Guo Sep 17, 2015

ARM: imx53: qsrb: fix PMIC interrupt level



The MC34708 PMIC interrupt level is active high, but was set to
active low in the devicetree, probably as a result of a copy and
paste error from the QSB board.

This caused IRQ storms and led to the kernel disabling the PMIC
interrupt.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

parent 34adba71

arch/arm/boot/dts/imx53-qsrb.dts

+1 −1

Original line number	Diff line number	Diff line
		@@ -36,7 +36,7 @@
		pinctrl-0 = <&pinctrl_pmic>;
		reg = <0x08>;
		interrupt-parent = <&gpio5>;
		interrupts = <23 0x8>;
		interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
		regulators {
		sw1_reg: sw1a {
		regulator-name = "SW1";