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Commit e13cccfd authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'spi-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into next 

Pull spi updates from Mark Brown:
 "For this release SPI has been exceptionally quiet, all the work has
  been on improving drivers (including taking advantage of some of the
  recent framework updates):

   - DMA support for the rspi driver providing a nice performance boost
   - performance improvement for the SIRF controller in PIO mode
   - new support for the Cadence SPI IP and for pxa2xx on BayTrail"

* tag 'spi-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (59 commits)
  spi: rspi: Extract rspi_common_transfer()
  spi: rspi: Add DMA support for RSPI on RZ/A1H
  spi: rspi: Add DMA support for QSPI on R-Car Gen2
  spi: rspi: Absorb rspi_rz_transfer_out_in() into rspi_rz_transfer_one()
  spi: rspi: Merge rspi_*_dma() into rspi_dma_transfer()
  spi: rspi: Pass sg_tables instead of spi_tranfer to rspi_*_dma()
  spi: rspi: Move RSPI-specific setup out of DMA routines
  spi: rspi: Use SPI core DMA mapping framework
  spi: rspi: SPI DMA core needs both RX and TX DMA to function
  spi: rspi: Remove unneeded resource test in DMA setup
  spi: rspi: Extract rspi_request_dma_chan()
  spi: rspi: Don't consider DMA configuration failures fatal
  spi: rspi: Extract rspi_pio_transfer()
  spi: rspi: Use core SPI_MASTER_MUST_[RT]X handling
  spi: rspi: Remove unused 16-bit DMA support
  spi: rspi: Do not call rspi_receive_init() for TX-only
  spi: rspi: Extract rspi_wait_for_{tx_empty,rx_full}()
  spi/pxa2xx: fix runtime PM enabling order
  spi/fsl-espi: fix rx_buf in fsl_espi_cmd_trans()/fsl_espi_rw_trans()
  spi: core: Ignore unsupported spi-[tr]x-bus-width property values
  ...
parents de6b25de 69e25c75

Documentation/devicetree/bindings/spi/fsl-spi.txt

+6 −0
Original line number Diff line number Diff line
@@ -42,6 +42,10 @@ Required properties: 
- interrupts : should contain eSPI interrupt, the device has one interrupt.

- fsl,espi-num-chipselects : the number of the chipselect signals.



Optional properties:

- fsl,csbef: chip select assertion time in bits before frame starts

- fsl,csaft: chip select negation time in bits after frame ends



Example:

	spi@110000 {

		#address-cells = <1>;
@@ -51,4 +55,6 @@ Example: 
		interrupts = <53 0x2>;

		interrupt-parent = <&mpic>;

		fsl,espi-num-chipselects = <4>;

		fsl,csbef = <1>;

		fsl,csaft = <1>;

	};

Documentation/devicetree/bindings/spi/spi-bus.txt

+2 −0
Original line number Diff line number Diff line
@@ -55,6 +55,8 @@ contain the following properties. 
    		chip select active high

- spi-3wire       - (optional) Empty property indicating device requires

    		    3-wire mode.

- spi-lsb-first   - (optional) Empty property indicating device requires

		LSB first mode.

- spi-tx-bus-width - (optional) The bus width(number of data wires) that

                      used for MOSI. Defaults to 1 if not present.

- spi-rx-bus-width - (optional) The bus width(number of data wires) that

Documentation/devicetree/bindings/spi/spi-cadence.txt

0 → 100644
+31 −0
Original line number Diff line number Diff line 
Cadence SPI controller Device Tree Bindings

-------------------------------------------



Required properties:

- compatible		: Should be "cdns,spi-r1p6" or "xlnx,zynq-spi-r1p6".

- reg			: Physical base address and size of SPI registers map.

- interrupts		: Property with a value describing the interrupt

			  number.

- interrupt-parent	: Must be core interrupt controller

- clock-names		: List of input clock names - "ref_clk", "pclk"

			  (See clock bindings for details).

- clocks		: Clock phandles (see clock bindings for details).



Optional properties:

- num-cs		: Number of chip selects used.

			  If a decoder is used, this will be the number of

			  chip selects after the decoder.

- is-decoded-cs		: Flag to indicate whether decoder is used or not.



Example:



	spi@e0007000 {

		compatible = "xlnx,zynq-spi-r1p6";

		clock-names = "ref_clk", "pclk";

		clocks = <&clkc 26>, <&clkc 35>;

		interrupt-parent = <&intc>;

		interrupts = <0 49 4>;

		num-cs = <4>;

		is-decoded-cs = <0>;

		reg = <0xe0007000 0x1000>;

	} ;

Documentation/devicetree/bindings/spi/spi-dw.txt

0 → 100644
+24 −0
Original line number Diff line number Diff line 
Synopsys DesignWare SPI master



Required properties:

- compatible: should be "snps,designware-spi"

- #address-cells: see spi-bus.txt

- #size-cells: see spi-bus.txt

- reg: address and length of the spi master registers

- interrupts: should contain one interrupt

- clocks: spi clock phandle

- num-cs: see spi-bus.txt



Optional properties:

- cs-gpios: see spi-bus.txt



Example:



spi: spi@4020a000 {

	compatible = "snps,designware-spi";

	interrupts = <11 1>;

	reg = <0x4020a000 0x1000>;

	clocks = <&pclk>;

	num-cs = <2>;

	cs-gpios = <&banka 0 0>;

};

arch/blackfin/mach-bf609/boards/ezkit.c

+11 −11
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@ 
#include <linux/pinctrl/machine.h>

#include <linux/pinctrl/pinconf-generic.h>

#include <linux/platform_data/pinctrl-adi2.h>

#include <asm/bfin_spi3.h>

#include <linux/spi/adi_spi3.h>

#include <asm/dma.h>

#include <asm/gpio.h>

#include <asm/nand.h>
@@ -767,13 +767,13 @@ static struct flash_platform_data bfin_spi_flash_data = { 
	.type = "w25q32",

};



static struct bfin_spi3_chip spi_flash_chip_info = {

static struct adi_spi3_chip spi_flash_chip_info = {

	.enable_dma = true,         /* use dma transfer with this chip*/

};

#endif



#if IS_ENABLED(CONFIG_SPI_SPIDEV)

static struct bfin_spi3_chip spidev_chip_info = {

static struct adi_spi3_chip spidev_chip_info = {

	.enable_dma = true,

};

#endif
@@ -1736,7 +1736,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { 
	},

#endif

};

#if IS_ENABLED(CONFIG_SPI_BFIN_V3)

#if IS_ENABLED(CONFIG_SPI_ADI_V3)

/* SPI (0) */

static struct resource bfin_spi0_resource[] = {

	{
@@ -1777,13 +1777,13 @@ static struct resource bfin_spi1_resource[] = { 
};



/* SPI controller data */

static struct bfin_spi3_master bf60x_spi_master_info0 = {

static struct adi_spi3_master bf60x_spi_master_info0 = {

	.num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,

	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},

};



static struct platform_device bf60x_spi_master0 = {

	.name = "bfin-spi3",

	.name = "adi-spi3",

	.id = 0, /* Bus number */

	.num_resources = ARRAY_SIZE(bfin_spi0_resource),

	.resource = bfin_spi0_resource,
@@ -1792,13 +1792,13 @@ static struct platform_device bf60x_spi_master0 = { 
	},

};



static struct bfin_spi3_master bf60x_spi_master_info1 = {

static struct adi_spi3_master bf60x_spi_master_info1 = {

	.num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,

	.pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},

};



static struct platform_device bf60x_spi_master1 = {

	.name = "bfin-spi3",

	.name = "adi-spi3",

	.id = 1, /* Bus number */

	.num_resources = ARRAY_SIZE(bfin_spi1_resource),

	.resource = bfin_spi1_resource,
@@ -1990,7 +1990,7 @@ static struct platform_device *ezkit_devices[] __initdata = { 
	&bfin_sdh_device,

#endif



#if IS_ENABLED(CONFIG_SPI_BFIN_V3)

#if IS_ENABLED(CONFIG_SPI_ADI_V3)

	&bf60x_spi_master0,

	&bf60x_spi_master1,

#endif
@@ -2051,8 +2051,8 @@ static struct pinctrl_map __initdata bfin_pinmux_map[] = { 
	PIN_MAP_MUX_GROUP_DEFAULT("bfin_sir.1",  "pinctrl-adi2.0", NULL, "uart1"),

	PIN_MAP_MUX_GROUP_DEFAULT("bfin-sdh.0",  "pinctrl-adi2.0", NULL, "rsi0"),

	PIN_MAP_MUX_GROUP_DEFAULT("stmmaceth.0",  "pinctrl-adi2.0", NULL, "eth0"),

	PIN_MAP_MUX_GROUP_DEFAULT("bfin-spi3.0",  "pinctrl-adi2.0", NULL, "spi0"),

	PIN_MAP_MUX_GROUP_DEFAULT("bfin-spi3.1",  "pinctrl-adi2.0", NULL, "spi1"),

	PIN_MAP_MUX_GROUP_DEFAULT("adi-spi3.0",  "pinctrl-adi2.0", NULL, "spi0"),

	PIN_MAP_MUX_GROUP_DEFAULT("adi-spi3.1",  "pinctrl-adi2.0", NULL, "spi1"),

	PIN_MAP_MUX_GROUP_DEFAULT("i2c-bfin-twi.0",  "pinctrl-adi2.0", NULL, "twi0"),

	PIN_MAP_MUX_GROUP_DEFAULT("i2c-bfin-twi.1",  "pinctrl-adi2.0", NULL, "twi1"),

	PIN_MAP_MUX_GROUP_DEFAULT("bfin-rotary",  "pinctrl-adi2.0", NULL, "rotary"),