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Commit e05f9ac4 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'imx-soc-3.14' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc 

From Shawn Guo:
i.MX SoC changes for 3.14:
 - Add the initial i.MX50 SoC support
 - Support device tree boot for i.MX35
 - Move imx5 clock driver to use macros for clock ID
 - Some random updates and non-critical fixes on clock drivers
 - A few defconfig updates and minor cleanups

* tag 'imx-soc-3.14' of git://git.linaro.org/people/shawnguo/linux-2.6

: (37 commits)
  ARM: imx: improve the comment of CCM lpm SW workaround
  ARM: imx: improve status check of clock gate
  ARM: imx: add necessary interface for pfd
  ARM: imx_v6_v7_defconfig: Select CONFIG_REGULATOR_PFUZE100
  ARM: imx_v6_v7_defconfig: Select MX35 and MX50 device tree support
  ARM: imx: Add cpu frequency scaling support
  ARM i.MX35: Add devicetree support.
  ARM: imx: update imx_v6_v7_defconfig
  ARM: imx6sl: Add missing spba clock to clock tree
  ARM: imx6sl: Add missing pll4_audio_div to the clock tree
  ARM: imx6: Derive spdif clock from pll3_pfd3_454m
  ARM: imx: use __initconst for const init definition
  ARM i.MX5: fix obvious typo in ldb_di0_gate clk definition
  ARM i.MX5: set CAN peripheral clock to 24 MHz parent
  ARM: imx: pllv1: Fix PLL calculation for i.MX27
  ARM i.MX5: fix "shift" value for lp_apm_sel on i.MX50 and i.MX53
  ARM: imx: imx53: Add SATA PHY clock
  ARM: imx_v6_v7_defconfig: Enable STMPE touchscreen
  ARM: imx: rename IMX6SL_CLK_CLK_END to IMX6SL_CLK_END
  ARM: imx: select PINCTRL at sub-architecure level
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents c655479a 48c95841

Documentation/devicetree/bindings/clock/imx35-clock.txt

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+113 −0
Original line number Diff line number Diff line 
* Clock bindings for Freescale i.MX35



Required properties:

- compatible: Should be "fsl,imx35-ccm"

- reg: Address and length of the register set

- interrupts: Should contain CCM interrupt

- #clock-cells: Should be <1>



The clock consumer should specify the desired clock by having the clock

ID in its "clocks" phandle cell.  The following is a full list of i.MX35

clocks and IDs.



	Clock			ID

	---------------------------

	ckih			0

	mpll			1

	ppll			2

	mpll_075		3

	arm			4

	hsp			5

	hsp_div			6

	hsp_sel			7

	ahb			8

	ipg			9

	arm_per_div		10

	ahb_per_div		11

	ipg_per			12

	uart_sel		13

	uart_div		14

	esdhc_sel		15

	esdhc1_div		16

	esdhc2_div		17

	esdhc3_div		18

	spdif_sel		19

	spdif_div_pre		20

	spdif_div_post		21

	ssi_sel			22

	ssi1_div_pre		23

	ssi1_div_post		24

	ssi2_div_pre		25

	ssi2_div_post		26

	usb_sel			27

	usb_div			28

	nfc_div			29

	asrc_gate		30

	pata_gate		31

	audmux_gate		32

	can1_gate		33

	can2_gate		34

	cspi1_gate		35

	cspi2_gate		36

	ect_gate		37

	edio_gate		38

	emi_gate		39

	epit1_gate		40

	epit2_gate		41

	esai_gate		42

	esdhc1_gate		43

	esdhc2_gate		44

	esdhc3_gate		45

	fec_gate		46

	gpio1_gate		47

	gpio2_gate		48

	gpio3_gate		49

	gpt_gate		50

	i2c1_gate		51

	i2c2_gate		52

	i2c3_gate		53

	iomuxc_gate		54

	ipu_gate		55

	kpp_gate		56

	mlb_gate		57

	mshc_gate		58

	owire_gate		59

	pwm_gate		60

	rngc_gate		61

	rtc_gate		62

	rtic_gate		63

	scc_gate		64

	sdma_gate		65

	spba_gate		66

	spdif_gate		67

	ssi1_gate		68

	ssi2_gate		69

	uart1_gate		70

	uart2_gate		71

	uart3_gate		72

	usbotg_gate		73

	wdog_gate		74

	max_gate		75

	admux_gate		76

	csi_gate		77

	csi_div			78

	csi_sel			79

	iim_gate		80

	gpu2d_gate		81



Examples:



clks: ccm@53f80000 {

	compatible = "fsl,imx35-ccm";

	reg = <0x53f80000 0x4000>;

	interrupts = <31>;

	#clock-cells = <1>;

};



esdhc1: esdhc@53fb4000 {

	compatible = "fsl,imx35-esdhc";

	reg = <0x53fb4000 0x4000>;

	interrupts = <7>;

	clocks = <&clks 9>, <&clks 8>, <&clks 43>;

	clock-names = "ipg", "ahb", "per";

};

Documentation/devicetree/bindings/clock/imx5-clock.txt

+3 −192
Original line number Diff line number Diff line
@@ -7,197 +7,8 @@ Required properties: 
- #clock-cells: Should be <1>



The clock consumer should specify the desired clock by having the clock

ID in its "clocks" phandle cell.  The following is a full list of i.MX5

clocks and IDs.



	Clock			ID

	---------------------------

	dummy			0

	ckil			1

	osc			2

	ckih1			3

	ckih2			4

	ahb			5

	ipg			6

	axi_a			7

	axi_b			8

	uart_pred		9

	uart_root		10

	esdhc_a_pred		11

	esdhc_b_pred		12

	esdhc_c_s		13

	esdhc_d_s		14

	emi_sel			15

	emi_slow_podf		16

	nfc_podf		17

	ecspi_pred		18

	ecspi_podf		19

	usboh3_pred		20

	usboh3_podf		21

	usb_phy_pred		22

	usb_phy_podf		23

	cpu_podf		24

	di_pred			25

	tve_s			27

	uart1_ipg_gate		28

	uart1_per_gate		29

	uart2_ipg_gate		30

	uart2_per_gate		31

	uart3_ipg_gate		32

	uart3_per_gate		33

	i2c1_gate		34

	i2c2_gate		35

	gpt_ipg_gate		36

	pwm1_ipg_gate		37

	pwm1_hf_gate		38

	pwm2_ipg_gate		39

	pwm2_hf_gate		40

	gpt_hf_gate		41

	fec_gate		42

	usboh3_per_gate		43

	esdhc1_ipg_gate		44

	esdhc2_ipg_gate		45

	esdhc3_ipg_gate		46

	esdhc4_ipg_gate		47

	ssi1_ipg_gate		48

	ssi2_ipg_gate		49

	ssi3_ipg_gate		50

	ecspi1_ipg_gate		51

	ecspi1_per_gate		52

	ecspi2_ipg_gate		53

	ecspi2_per_gate		54

	cspi_ipg_gate		55

	sdma_gate		56

	emi_slow_gate		57

	ipu_s			58

	ipu_gate		59

	nfc_gate		60

	ipu_di1_gate		61

	vpu_s			62

	vpu_gate		63

	vpu_reference_gate	64

	uart4_ipg_gate		65

	uart4_per_gate		66

	uart5_ipg_gate		67

	uart5_per_gate		68

	tve_gate		69

	tve_pred		70

	esdhc1_per_gate		71

	esdhc2_per_gate		72

	esdhc3_per_gate		73

	esdhc4_per_gate		74

	usb_phy_gate		75

	hsi2c_gate		76

	mipi_hsc1_gate		77

	mipi_hsc2_gate		78

	mipi_esc_gate		79

	mipi_hsp_gate		80

	ldb_di1_div_3_5		81

	ldb_di1_div		82

	ldb_di0_div_3_5		83

	ldb_di0_div		84

	ldb_di1_gate		85

	can2_serial_gate	86

	can2_ipg_gate		87

	i2c3_gate		88

	lp_apm			89

	periph_apm		90

	main_bus		91

	ahb_max			92

	aips_tz1		93

	aips_tz2		94

	tmax1			95

	tmax2			96

	tmax3			97

	spba			98

	uart_sel		99

	esdhc_a_sel		100

	esdhc_b_sel		101

	esdhc_a_podf		102

	esdhc_b_podf		103

	ecspi_sel		104

	usboh3_sel		105

	usb_phy_sel		106

	iim_gate		107

	usboh3_gate		108

	emi_fast_gate		109

	ipu_di0_gate		110

	gpc_dvfs		111

	pll1_sw			112

	pll2_sw			113

	pll3_sw			114

	ipu_di0_sel		115

	ipu_di1_sel		116

	tve_ext_sel		117

	mx51_mipi		118

	pll4_sw			119

	ldb_di1_sel		120

	di_pll4_podf		121

	ldb_di0_sel		122

	ldb_di0_gate		123

	usb_phy1_gate		124

	usb_phy2_gate		125

	per_lp_apm		126

	per_pred1		127

	per_pred2		128

	per_podf		129

	per_root		130

	ssi_apm			131

	ssi1_root_sel		132

	ssi2_root_sel		133

	ssi3_root_sel		134

	ssi_ext1_sel		135

	ssi_ext2_sel		136

	ssi_ext1_com_sel	137

	ssi_ext2_com_sel	138

	ssi1_root_pred		139

	ssi1_root_podf		140

	ssi2_root_pred		141

	ssi2_root_podf		142

	ssi_ext1_pred		143

	ssi_ext1_podf		144

	ssi_ext2_pred		145

	ssi_ext2_podf		146

	ssi1_root_gate		147

	ssi2_root_gate		148

	ssi3_root_gate		149

	ssi_ext1_gate		150

	ssi_ext2_gate		151

	epit1_ipg_gate		152

	epit1_hf_gate		153

	epit2_ipg_gate		154

	epit2_hf_gate		155

	can_sel			156

	can1_serial_gate	157

	can1_ipg_gate		158

	owire_gate		159

	gpu3d_s			160

	gpu2d_s			161

	gpu3d_gate		162

	gpu2d_gate		163

	garb_gate		164

	cko1_sel		165

	cko1_podf		166

	cko1			167

	cko2_sel		168

	cko2_podf		169

	cko2			170

	srtc_gate		171

	pata_gate		172

	sata_gate		173

	spdif_xtal_sel		174

	spdif0_sel		175

	spdif1_sel		176

	spdif0_pred		177

	spdif0_podf		178

	spdif1_pred		179

	spdif1_podf		180

	spdif0_com_sel		181

	spdif1_com_sel		182

	spdif0_gate		183

	spdif1_gate		184

	spdif_ipg_gate		185

	ocram			186

ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx5-clock.h

for the full list of i.MX5 clock IDs.



Examples (for mx53):
@@ -212,7 +23,7 @@ can1: can@53fc8000 { 
	compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";

	reg = <0x53fc8000 0x4000>;

	interrupts = <82>;

	clocks = <&clks 158>, <&clks 157>;

	clocks = <&clks IMX5_CLK_CAN1_IPG_GATE>, <&clks IMX5_CLK_CAN1_SERIAL_GATE>;

	clock-names = "ipg", "per";

	status = "disabled";

};

arch/arm/Kconfig.debug

+9 −0
Original line number Diff line number Diff line
@@ -263,6 +263,13 @@ choice 
		  Say Y here if you want kernel low-level debugging support

		  on i.MX35.



	config DEBUG_IMX50_UART

		bool "i.MX50 Debug UART"

		depends on SOC_IMX50

		help

		  Say Y here if you want kernel low-level debugging support

		  on i.MX50.



	config DEBUG_IMX51_UART

		bool "i.MX51 Debug UART"

		depends on SOC_IMX51
@@ -905,6 +912,7 @@ config DEBUG_IMX_UART_PORT 
						DEBUG_IMX21_IMX27_UART || \

						DEBUG_IMX31_UART || \

						DEBUG_IMX35_UART || \

						DEBUG_IMX50_UART || \

						DEBUG_IMX51_UART || \

						DEBUG_IMX53_UART || \

						DEBUG_IMX6Q_UART || \
@@ -939,6 +947,7 @@ config DEBUG_LL_INCLUDE 
				 DEBUG_IMX21_IMX27_UART || \

				 DEBUG_IMX31_UART || \

				 DEBUG_IMX35_UART || \

				 DEBUG_IMX50_UART || \

				 DEBUG_IMX51_UART || \

				 DEBUG_IMX53_UART ||\

				 DEBUG_IMX6Q_UART || \

arch/arm/configs/imx_v4_v5_defconfig

+2 −0
Original line number Diff line number Diff line
@@ -91,6 +91,7 @@ CONFIG_SMSC911X=y 
CONFIG_SMSC_PHY=y

# CONFIG_INPUT_MOUSEDEV is not set

CONFIG_INPUT_EVDEV=y

CONFIG_KEYBOARD_GPIO=y

CONFIG_KEYBOARD_IMX=y

# CONFIG_INPUT_MOUSE is not set

CONFIG_INPUT_TOUCHSCREEN=y
@@ -118,6 +119,7 @@ CONFIG_IMX2_WDT=y 
CONFIG_MFD_MC13XXX_SPI=y

CONFIG_REGULATOR=y

CONFIG_REGULATOR_FIXED_VOLTAGE=y

CONFIG_REGULATOR_GPIO=y

CONFIG_REGULATOR_MC13783=y

CONFIG_REGULATOR_MC13892=y

CONFIG_MEDIA_SUPPORT=y

arch/arm/configs/imx_v6_v7_defconfig

+11 −2
Original line number Diff line number Diff line
@@ -28,11 +28,13 @@ CONFIG_MACH_QONG=y 
CONFIG_MACH_ARMADILLO5X0=y

CONFIG_MACH_KZM_ARM11_01=y

CONFIG_MACH_IMX31_DT=y

CONFIG_MACH_IMX35_DT=y

CONFIG_MACH_PCM043=y

CONFIG_MACH_MX35_3DS=y

CONFIG_MACH_VPR200=y

CONFIG_MACH_IMX51_DT=y

CONFIG_MACH_EUKREA_CPUIMX51SD=y

CONFIG_SOC_IMX50=y

CONFIG_SOC_IMX53=y

CONFIG_SOC_IMX6Q=y

CONFIG_SOC_IMX6SL=y
@@ -41,7 +43,7 @@ CONFIG_SMP=y 
CONFIG_VMSPLIT_2G=y

CONFIG_PREEMPT_VOLUNTARY=y

CONFIG_AEABI=y

# CONFIG_OABI_COMPAT is not set

CONFIG_HIGHMEM=y

CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"

CONFIG_VFP=y

CONFIG_NEON=y
@@ -89,7 +91,6 @@ CONFIG_MTD_UBI=y 
CONFIG_BLK_DEV_LOOP=y

CONFIG_BLK_DEV_RAM=y

CONFIG_BLK_DEV_RAM_SIZE=65536

CONFIG_SRAM=y

CONFIG_EEPROM_AT24=y

CONFIG_EEPROM_AT25=y

# CONFIG_SCSI_PROC_FS is not set
@@ -118,6 +119,7 @@ CONFIG_SMC91X=y 
CONFIG_SMC911X=y

CONFIG_SMSC911X=y

# CONFIG_NET_VENDOR_STMICRO is not set

CONFIG_AT803X_PHY=y

CONFIG_BRCMFMAC=m

# CONFIG_INPUT_MOUSEDEV_PSAUX is not set

CONFIG_INPUT_EVDEV=y
@@ -129,6 +131,8 @@ CONFIG_MOUSE_PS2_ELANTECH=y 
CONFIG_INPUT_TOUCHSCREEN=y

CONFIG_TOUCHSCREEN_EGALAX=y

CONFIG_TOUCHSCREEN_MC13783=y

CONFIG_TOUCHSCREEN_TSC2007=y

CONFIG_TOUCHSCREEN_STMPE=y

CONFIG_INPUT_MISC=y

CONFIG_INPUT_MMA8450=y

CONFIG_SERIO_SERPORT=m
@@ -156,14 +160,19 @@ CONFIG_IMX2_WDT=y 
CONFIG_MFD_DA9052_I2C=y

CONFIG_MFD_MC13XXX_SPI=y

CONFIG_MFD_MC13XXX_I2C=y

CONFIG_MFD_STMPE=y

CONFIG_REGULATOR=y

CONFIG_REGULATOR_FIXED_VOLTAGE=y

CONFIG_REGULATOR_ANATOP=y

CONFIG_REGULATOR_DA9052=y

CONFIG_REGULATOR_MC13783=y

CONFIG_REGULATOR_MC13892=y

CONFIG_REGULATOR_PFUZE100=y

CONFIG_MEDIA_SUPPORT=y

CONFIG_MEDIA_CAMERA_SUPPORT=y

CONFIG_MEDIA_RC_SUPPORT=y

CONFIG_RC_DEVICES=y

CONFIG_IR_GPIO_CIR=y

CONFIG_V4L_PLATFORM_DRIVERS=y

CONFIG_SOC_CAMERA=y

CONFIG_VIDEO_MX3=y