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Commit dfff24bd authored by Heiko Stuebner's avatar Heiko Stuebner
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clk: rockchip: only enter pll slow-mode directly before reboots on rk3288 



As commit 1d33929e ("clk: rockchip: switch PLLs to slow mode before
reboot for rk3288") states, switching the PLLs to slow-mode is only
necessary when rebooting using the soft-reset done through the CRU.

The dwc2 controllers used create really big number of interrupts in
special constellations involving usb-hubs and their number is so high,
it can even overwhelm the interrupt handler if the cpu-speed os to low.

Right now the PLLs are put into slow-mode in a shutdown syscore_ops
callback which means it happens on all reboots (not only the soft-reset
ones) and even on poweroff actions.

This can result in the system not powering off and getting stuck instead,
so we should move the slow-mode change nearer to the actual reboot action.

For this we introduce the possiblity to also set a callback that gets
called from the restart-handler directly prior to restarting the system
and move the shutdown-callback to this new option.

With this the slow-mode switch is done only on the necessary reboots
and also has a smaller possibility of causing artifacts.

Fixes: 1d33929e ("clk: rockchip: switch PLLs to slow mode before reboot for rk3288")
Signed-off-by: default avatarHeiko Stuebner <heiko.stuebner@collabora.com>
Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
parent 2abc02fc

drivers/clk/rockchip/clk-rk3036.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -473,6 +473,6 @@ static void __init rk3036_clk_init(struct device_node *np) 
	rockchip_register_softrst(np, 9, reg_base + RK2928_SOFTRST_CON(0),

	rockchip_register_softrst(np, 9, reg_base + RK2928_SOFTRST_CON(0),

				  ROCKCHIP_SOFTRST_HIWORD_MASK);

				  ROCKCHIP_SOFTRST_HIWORD_MASK);





	rockchip_register_restart_notifier(RK2928_GLB_SRST_FST);

	rockchip_register_restart_notifier(RK2928_GLB_SRST_FST, NULL);

}

}

CLK_OF_DECLARE(rk3036_cru, "rockchip,rk3036-cru", rk3036_clk_init);
 
CLK_OF_DECLARE(rk3036_cru, "rockchip,rk3036-cru", rk3036_clk_init);

drivers/clk/rockchip/clk-rk3188.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -750,7 +750,7 @@ static void __init rk3188_common_clk_init(struct device_node *np) 
	rockchip_register_softrst(np, 9, reg_base + RK2928_SOFTRST_CON(0),

	rockchip_register_softrst(np, 9, reg_base + RK2928_SOFTRST_CON(0),

				  ROCKCHIP_SOFTRST_HIWORD_MASK);

				  ROCKCHIP_SOFTRST_HIWORD_MASK);





	rockchip_register_restart_notifier(RK2928_GLB_SRST_FST);

	rockchip_register_restart_notifier(RK2928_GLB_SRST_FST, NULL);

}

}





static void __init rk3066a_clk_init(struct device_node *np)

static void __init rk3066a_clk_init(struct device_node *np)

drivers/clk/rockchip/clk-rk3228.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -673,6 +673,6 @@ static void __init rk3228_clk_init(struct device_node *np) 
	rockchip_register_softrst(np, 9, reg_base + RK2928_SOFTRST_CON(0),

	rockchip_register_softrst(np, 9, reg_base + RK2928_SOFTRST_CON(0),

				  ROCKCHIP_SOFTRST_HIWORD_MASK);

				  ROCKCHIP_SOFTRST_HIWORD_MASK);





	rockchip_register_restart_notifier(RK3228_GLB_SRST_FST);

	rockchip_register_restart_notifier(RK3228_GLB_SRST_FST, NULL);

}

}

CLK_OF_DECLARE(rk3228_cru, "rockchip,rk3228-cru", rk3228_clk_init);
 
CLK_OF_DECLARE(rk3228_cru, "rockchip,rk3228-cru", rk3228_clk_init);

drivers/clk/rockchip/clk-rk3288.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -848,7 +848,6 @@ static void rk3288_clk_shutdown(void) 
static struct syscore_ops rk3288_clk_syscore_ops = {

static struct syscore_ops rk3288_clk_syscore_ops = {

	.suspend = rk3288_clk_suspend,

	.suspend = rk3288_clk_suspend,

	.resume = rk3288_clk_resume,

	.resume = rk3288_clk_resume,

	.shutdown = rk3288_clk_shutdown,

};

};





static void __init rk3288_clk_init(struct device_node *np)

static void __init rk3288_clk_init(struct device_node *np)
@@ -906,7 +905,8 @@ static void __init rk3288_clk_init(struct device_node *np) 
				  rk3288_cru_base + RK3288_SOFTRST_CON(0),

				  rk3288_cru_base + RK3288_SOFTRST_CON(0),

				  ROCKCHIP_SOFTRST_HIWORD_MASK);

				  ROCKCHIP_SOFTRST_HIWORD_MASK);





	rockchip_register_restart_notifier(RK3288_GLB_SRST_FST);

	rockchip_register_restart_notifier(RK3288_GLB_SRST_FST,

					   rk3288_clk_shutdown);

	register_syscore_ops(&rk3288_clk_syscore_ops);

	register_syscore_ops(&rk3288_clk_syscore_ops);

}

}

CLK_OF_DECLARE(rk3288_cru, "rockchip,rk3288-cru", rk3288_clk_init);
 
CLK_OF_DECLARE(rk3288_cru, "rockchip,rk3288-cru", rk3288_clk_init);

drivers/clk/rockchip/clk-rk3368.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -889,6 +889,6 @@ static void __init rk3368_clk_init(struct device_node *np) 
	rockchip_register_softrst(np, 15, reg_base + RK3368_SOFTRST_CON(0),

	rockchip_register_softrst(np, 15, reg_base + RK3368_SOFTRST_CON(0),

				  ROCKCHIP_SOFTRST_HIWORD_MASK);

				  ROCKCHIP_SOFTRST_HIWORD_MASK);





	rockchip_register_restart_notifier(RK3368_GLB_SRST_FST);

	rockchip_register_restart_notifier(RK3368_GLB_SRST_FST, NULL);

}

}

CLK_OF_DECLARE(rk3368_cru, "rockchip,rk3368-cru", rk3368_clk_init);
 
CLK_OF_DECLARE(rk3368_cru, "rockchip,rk3368-cru", rk3368_clk_init);