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Commit dea3766c authored by Robert Richter's avatar Robert Richter
Browse files

x86/oprofile: replace CTRL_SET_*ACTIVE macros 



The patch replaces all CTRL_SET_*ACTIVE macros. 64 bit MSR functions
and 64 bit counter values are used now. The code uses bit masks from
<asm/intel_arch_perfmon.h>.

Signed-off-by: default avatarRobert Richter <robert.richter@amd.com>
parent 42399adb

arch/x86/oprofile/op_model_amd.c

+8 −8
Original line number Diff line number Diff line
@@ -262,13 +262,13 @@ static int op_amd_check_ctrs(struct pt_regs * const regs, 


static void op_amd_start(struct op_msrs const * const msrs)

{

	unsigned int low, high;

	u64 val;

	int i;

	for (i = 0 ; i < NUM_COUNTERS ; ++i) {

		if (reset_value[i]) {

			rdmsr(msrs->controls[i].addr, low, high);

			CTRL_SET_ACTIVE(low);

			wrmsr(msrs->controls[i].addr, low, high);

			rdmsrl(msrs->controls[i].addr, val);

			val |= ARCH_PERFMON_EVENTSEL0_ENABLE;

			wrmsrl(msrs->controls[i].addr, val);

		}

	}
@@ -277,7 +277,7 @@ static void op_amd_start(struct op_msrs const * const msrs) 


static void op_amd_stop(struct op_msrs const * const msrs)

{

	unsigned int low, high;

	u64 val;

	int i;



	/*
@@ -287,9 +287,9 @@ static void op_amd_stop(struct op_msrs const * const msrs) 
	for (i = 0 ; i < NUM_COUNTERS ; ++i) {

		if (!reset_value[i])

			continue;

		rdmsr(msrs->controls[i].addr, low, high);

		CTRL_SET_INACTIVE(low);

		wrmsr(msrs->controls[i].addr, low, high);

		rdmsrl(msrs->controls[i].addr, val);

		val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE;

		wrmsrl(msrs->controls[i].addr, val);

	}



	op_amd_stop_ibs();

arch/x86/oprofile/op_model_ppro.c

+8 −8
Original line number Diff line number Diff line
@@ -145,16 +145,16 @@ static int ppro_check_ctrs(struct pt_regs * const regs, 


static void ppro_start(struct op_msrs const * const msrs)

{

	unsigned int low, high;

	u64 val;

	int i;



	if (!reset_value)

		return;

	for (i = 0; i < num_counters; ++i) {

		if (reset_value[i]) {

			rdmsr(msrs->controls[i].addr, low, high);

			CTRL_SET_ACTIVE(low);

			wrmsr(msrs->controls[i].addr, low, high);

			rdmsrl(msrs->controls[i].addr, val);

			val |= ARCH_PERFMON_EVENTSEL0_ENABLE;

			wrmsrl(msrs->controls[i].addr, val);

		}

	}

}
@@ -162,7 +162,7 @@ static void ppro_start(struct op_msrs const * const msrs) 


static void ppro_stop(struct op_msrs const * const msrs)

{

	unsigned int low, high;

	u64 val;

	int i;



	if (!reset_value)
@@ -170,9 +170,9 @@ static void ppro_stop(struct op_msrs const * const msrs) 
	for (i = 0; i < num_counters; ++i) {

		if (!reset_value[i])

			continue;

		rdmsr(msrs->controls[i].addr, low, high);

		CTRL_SET_INACTIVE(low);

		wrmsr(msrs->controls[i].addr, low, high);

		rdmsrl(msrs->controls[i].addr, val);

		val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE;

		wrmsrl(msrs->controls[i].addr, val);

	}

}

arch/x86/oprofile/op_x86_model.h

+0 −2
Original line number Diff line number Diff line
@@ -17,8 +17,6 @@ 


#define CTR_IS_RESERVED(msrs, c)	((msrs)->counters[(c)].addr ? 1 : 0)

#define CTRL_IS_RESERVED(msrs, c)	((msrs)->controls[(c)].addr ? 1 : 0)

#define CTRL_SET_ACTIVE(val)		((val) |= ARCH_PERFMON_EVENTSEL0_ENABLE)

#define CTRL_SET_INACTIVE(val)		((val) &= ~ARCH_PERFMON_EVENTSEL0_ENABLE)



struct op_saved_msr {

	unsigned int high;