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Commit dde90d89 authored by Ian Abbott's avatar Ian Abbott Committed by Greg Kroah-Hartman
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staging: comedi: drivers: re-do PLX PCI 9080 DMADPRx register values



Replace the existing macros in "plx9080.h" that define values for the
DMADPR0 and DMADPR1 registers.  (A little-endian version of the register
value is also placed in the `next` member of `struct plx_dma_desc`.)
Use the prefix `PLX_DMADPR_` for the macros.  Make use of the `BIT(x)`
and `GENMASK(h,l)` macros to define the values.

Signed-off-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 65bf53de
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+11 −11
Original line number Diff line number Diff line
@@ -1534,8 +1534,8 @@ static int alloc_and_init_dma_members(struct comedi_device *dev)
			cpu_to_le32((devpriv->ai_dma_desc_bus_addr +
				     ((i + 1) % ai_dma_ring_count(board)) *
				     sizeof(devpriv->ai_dma_desc[0])) |
				    PLX_DESC_IN_PCI_BIT | PLX_INTR_TERM_COUNT |
				    PLX_XFER_LOCAL_TO_PCI);
				    PLX_DMADPR_DESCPCI | PLX_DMADPR_TCINTR |
				    PLX_DMADPR_XFERL2P);
	}
	if (ao_cmd_is_supported(board)) {
		for (i = 0; i < AO_DMA_RING_COUNT; i++) {
@@ -1549,8 +1549,8 @@ static int alloc_and_init_dma_members(struct comedi_device *dev)
				cpu_to_le32((devpriv->ao_dma_desc_bus_addr +
					     ((i + 1) % (AO_DMA_RING_COUNT)) *
					     sizeof(devpriv->ao_dma_desc[0])) |
					    PLX_DESC_IN_PCI_BIT |
					    PLX_INTR_TERM_COUNT);
					    PLX_DMADPR_DESCPCI |
					    PLX_DMADPR_TCINTR);
		}
	}
	return 0;
@@ -2634,9 +2634,9 @@ static int ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
		/*  give location of first dma descriptor */
		load_first_dma_descriptor(dev, 1,
					  devpriv->ai_dma_desc_bus_addr |
					  PLX_DESC_IN_PCI_BIT |
					  PLX_INTR_TERM_COUNT |
					  PLX_XFER_LOCAL_TO_PCI);
					  PLX_DMADPR_DESCPCI |
					  PLX_DMADPR_TCINTR |
					  PLX_DMADPR_XFERL2P);

		dma_start_sync(dev, 1);
	}
@@ -2918,7 +2918,7 @@ static void restart_ao_dma(struct comedi_device *dev)
	unsigned int dma_desc_bits;

	dma_desc_bits = readl(devpriv->plx9080_iobase + PLX_REG_DMADPR0);
	dma_desc_bits &= ~PLX_END_OF_CHAIN_BIT;
	dma_desc_bits &= ~PLX_DMADPR_CHAINEND;
	load_first_dma_descriptor(dev, 0, dma_desc_bits);

	dma_start_sync(dev, 0);
@@ -2959,14 +2959,14 @@ static unsigned int load_ao_dma_buffer(struct comedi_device *dev,
	devpriv->ao_dma_desc[buffer_index].transfer_size = cpu_to_le32(nbytes);
	/* set end of chain bit so we catch underruns */
	next_bits = le32_to_cpu(devpriv->ao_dma_desc[buffer_index].next);
	next_bits |= PLX_END_OF_CHAIN_BIT;
	next_bits |= PLX_DMADPR_CHAINEND;
	devpriv->ao_dma_desc[buffer_index].next = cpu_to_le32(next_bits);
	/*
	 * clear end of chain bit on previous buffer now that we have set it
	 * for the last buffer
	 */
	next_bits = le32_to_cpu(devpriv->ao_dma_desc[prev_buffer_index].next);
	next_bits &= ~PLX_END_OF_CHAIN_BIT;
	next_bits &= ~PLX_DMADPR_CHAINEND;
	devpriv->ao_dma_desc[prev_buffer_index].next = cpu_to_le32(next_bits);

	devpriv->ao_dma_index = (buffer_index + 1) % AO_DMA_RING_COUNT;
@@ -3310,7 +3310,7 @@ static int ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
	set_dac_select_reg(dev, cmd);
	set_dac_interval_regs(dev, cmd);
	load_first_dma_descriptor(dev, 0, devpriv->ao_dma_desc_bus_addr |
				  PLX_DESC_IN_PCI_BIT | PLX_INTR_TERM_COUNT);
				  PLX_DMADPR_DESCPCI | PLX_DMADPR_TCINTR);

	set_dac_control1_reg(dev, cmd);
	s->async->inttrig = ao_inttrig;
+4 −4
Original line number Diff line number Diff line
@@ -310,8 +310,8 @@ static int gsc_hpdi_cmd(struct comedi_device *dev,
	writel(0, devpriv->plx9080_mmio + PLX_REG_DMALADR0);

	/* give location of first dma descriptor */
	bits = devpriv->dma_desc_phys_addr | PLX_DESC_IN_PCI_BIT |
	       PLX_INTR_TERM_COUNT | PLX_XFER_LOCAL_TO_PCI;
	bits = devpriv->dma_desc_phys_addr | PLX_DMADPR_DESCPCI |
	       PLX_DMADPR_TCINTR | PLX_DMADPR_XFERL2P;
	writel(bits, devpriv->plx9080_mmio + PLX_REG_DMADPR0);

	/* enable dma transfer */
@@ -422,8 +422,8 @@ static int gsc_hpdi_setup_dma_descriptors(struct comedi_device *dev,
{
	struct hpdi_private *devpriv = dev->private;
	dma_addr_t phys_addr = devpriv->dma_desc_phys_addr;
	u32 next_bits = PLX_DESC_IN_PCI_BIT | PLX_INTR_TERM_COUNT |
			PLX_XFER_LOCAL_TO_PCI;
	u32 next_bits = PLX_DMADPR_DESCPCI | PLX_DMADPR_TCINTR |
			PLX_DMADPR_XFERL2P;
	unsigned int offset = 0;
	unsigned int idx = 0;
	unsigned int i;
+10 −7
Original line number Diff line number Diff line
@@ -513,13 +513,16 @@ struct plx_dma_desc {
#define PLX_REG_DMADPR0		0x0090
#define PLX_REG_DMADPR1		0x00a4

/*  descriptor is located in pci space (not local space) */
#define  PLX_DESC_IN_PCI_BIT	0x1
#define  PLX_END_OF_CHAIN_BIT	0x2	/*  end of chain bit */
/*  interrupt when this descriptor's transfer is finished */
#define  PLX_INTR_TERM_COUNT	0x4
/*  transfer from local to pci bus (not pci to local) */
#define  PLX_XFER_LOCAL_TO_PCI 0x8
/* Descriptor Located In PCI Address Space (not local address space) */
#define PLX_DMADPR_DESCPCI	BIT(0)
/* End Of Chain */
#define PLX_DMADPR_CHAINEND	BIT(1)
/* Interrupt After Terminal Count */
#define PLX_DMADPR_TCINTR	BIT(2)
/* Direction Of Transfer Local Bus To PCI (not PCI to local) */
#define PLX_DMADPR_XFERL2P	BIT(3)
/* Next Descriptor Address Bits 31:4 (16 byte boundary) */
#define PLX_DMADPR_NEXT_MASK	GENMASK(31, 4)

/* DMA Channel N Command/Status Register (N <= 1) (8-bit) */
#define PLX_REG_DMACSR(n)	((n) ? PLX_REG_DMACSR1 : PLX_REG_DMACSR0)