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Commit d9e65791 authored by Jon Hunter's avatar Jon Hunter Committed by Thierry Reding
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clk: tegra: Fix sparse warning for pll_m 



Sparse generates the following warning for the pll_m params structure:

drivers/clk/tegra/clk-tegra210.c:1569:10: warning: Initializer entry
 defined twice
drivers/clk/tegra/clk-tegra210.c:1570:10:   also defined here

Fix this by correcting the index for the MISC1 register.

Fixes: b31eba5ff3f7 ("clk: tegra: Add support for Tegra210 clocks")

Signed-off-by: default avatarJon Hunter <jonathanh@nvidia.com>
Acked-by: default avatarRhyland Klein <rklein@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 2d5b6cf8

drivers/clk/tegra/clk-tegra210.c

+1 −1
Original line number Diff line number Diff line
@@ -1566,7 +1566,7 @@ static struct tegra_clk_pll_params pll_m_params = { 
	.iddq_bit_idx = PLLM_IDDQ_BIT,

	.max_p = PLL_QLIN_PDIV_MAX,

	.ext_misc_reg[0] = PLLM_MISC2,

	.ext_misc_reg[0] = PLLM_MISC1,

	.ext_misc_reg[1] = PLLM_MISC1,

	.round_p_to_pdiv = pll_qlin_p_to_pdiv,

	.pdiv_tohw = pll_qlin_pdiv_to_hw,

	.div_nmp = &pllm_nmp,