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Commit d9428f09 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata 

Pull libata update from Tejun Heo:
 "AHCI is getting per-port irq handling and locks for better
  scalability.  The gain is not huge but measureable with multiple high
  iops devices connected to the same host; however, the value of
  threaded IRQ handling seems negligible for AHCI and it likely will
  revert to non-threaded handling soon.

  Another noteworthy change is George Spelvin's "libata: Un-break ATA
  blacklist".  During 3.17 devel cycle, the libata blacklist glob
  matching got generalized and rewritten; unfortunately, the patch
  forgot to swap arguments to match the new match function and ended up
  breaking blacklist matching completely.  It got noticed only a couple
  days ago so it couldn't make for-3.17-fixes either.  :(

  Other than the above two, nothing too interesting - the usual cleanup
  churns and device-specific changes"

* 'for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: (22 commits)
  pata_serverworks: disable 64-KB DMA transfers on Broadcom OSB4 IDE Controller
  libata: Un-break ATA blacklist
  AHCI: Do not acquire ata_host::lock from single IRQ handler
  AHCI: Optimize single IRQ interrupt processing
  AHCI: Do not read HOST_IRQ_STAT reg in multi-MSI mode
  AHCI: Make few function names more descriptive
  AHCI: Move host activation code into ahci_host_activate()
  AHCI: Move ahci_host_activate() function to libahci.c
  AHCI: Pass SCSI host template as arg to ahci_host_activate()
  ata: pata_imx: Use the SIMPLE_DEV_PM_OPS() macro
  AHCI: Cleanup checking of multiple MSIs/SLM modes
  libata-sff: Fix controllers with no ctl port
  ahci_xgene: Fix the error print invalid resource for APM X-Gene SoC AHCI SATA Host Controller driver.
  libata: change ata_<foo>_printk routines to return void
  ata: qcom: Add device tree bindings information
  ahci-platform: Bump max number of clocks to 5
  ahci: ahci_p5wdh_workaround - constify DMI table
  libahci_platform: Staticize ahci_platform_<en/dis>able_phys()
  pata_platform: Remove useless irq_flags field
  pata_of_platform: Remove "electra-ide" quirk
  ...
parents 0cf744bc 37017ac6

Documentation/devicetree/bindings/ata/qcom-sata.txt

0 → 100644
+48 −0
Original line number Diff line number Diff line 
* Qualcomm AHCI SATA Controller



SATA nodes are defined to describe on-chip Serial ATA controllers.

Each SATA controller should have its own node.



Required properties:

- compatible		: compatible list, must contain "generic-ahci"

- interrupts		: <interrupt mapping for SATA IRQ>

- reg			: <registers mapping>

- phys			: Must contain exactly one entry as specified

			  in phy-bindings.txt

- phy-names		: Must be "sata-phy"



Required properties for "qcom,ipq806x-ahci" compatible:

- clocks		: Must contain an entry for each entry in clock-names.

- clock-names		: Shall be:

				"slave_iface" - Fabric port AHB clock for SATA

				"iface" - AHB clock

				"core" - core clock

				"rxoob" - RX out-of-band clock

				"pmalive" - Power Module Alive clock

- assigned-clocks	: Shall be:

				SATA_RXOOB_CLK

				SATA_PMALIVE_CLK

- assigned-clock-rates	: Shall be:

				100Mhz (100000000) for SATA_RXOOB_CLK

				100Mhz (100000000) for SATA_PMALIVE_CLK



Example:

	sata@29000000 {

		compatible = "qcom,ipq806x-ahci", "generic-ahci";

		reg = <0x29000000 0x180>;



		interrupts = <0 209 0x0>;



		clocks = <&gcc SFAB_SATA_S_H_CLK>,

			 <&gcc SATA_H_CLK>,

			 <&gcc SATA_A_CLK>,

			 <&gcc SATA_RXOOB_CLK>,

			 <&gcc SATA_PMALIVE_CLK>;

		clock-names = "slave_iface", "iface", "core",

				"rxoob", "pmalive";

		assigned-clocks = <&gcc SATA_RXOOB_CLK>, <&gcc SATA_PMALIVE_CLK>;

		assigned-clock-rates = <100000000>, <100000000>;



		phys = <&sata_phy>;

		phy-names = "sata-phy";

	};

arch/blackfin/mach-bf537/boards/cm_bf537e.c

+1 −2
Original line number Diff line number Diff line
@@ -733,7 +733,6 @@ static struct platform_device bfin_mac_device = { 


static struct pata_platform_info bfin_pata_platform_data = {

	.ioport_shift = 2,

	.irq_type = IRQF_TRIGGER_HIGH,

};



static struct resource bfin_pata_resources[] = {
@@ -750,7 +749,7 @@ static struct resource bfin_pata_resources[] = { 
	{

		.start = PATA_INT,

		.end = PATA_INT,

		.flags = IORESOURCE_IRQ,

		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,

	},

};

arch/blackfin/mach-bf537/boards/cm_bf537u.c

+1 −2
Original line number Diff line number Diff line
@@ -587,7 +587,6 @@ static struct platform_device bfin_mac_device = { 


static struct pata_platform_info bfin_pata_platform_data = {

	.ioport_shift = 2,

	.irq_type = IRQF_TRIGGER_HIGH,

};



static struct resource bfin_pata_resources[] = {
@@ -604,7 +603,7 @@ static struct resource bfin_pata_resources[] = { 
	{

		.start = PATA_INT,

		.end = PATA_INT,

		.flags = IORESOURCE_IRQ,

		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,

	},

};

arch/blackfin/mach-bf537/boards/stamp.c

+1 −2
Original line number Diff line number Diff line
@@ -2462,7 +2462,6 @@ static struct platform_device bfin_sport0_device = { 
#define PATA_INT	IRQ_PF5

static struct pata_platform_info bfin_pata_platform_data = {

	.ioport_shift = 1,

	.irq_flags = IRQF_TRIGGER_HIGH,

};



static struct resource bfin_pata_resources[] = {
@@ -2479,7 +2478,7 @@ static struct resource bfin_pata_resources[] = { 
	{

		.start = PATA_INT,

		.end = PATA_INT,

		.flags = IORESOURCE_IRQ,

		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,

	},

};

#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)

arch/blackfin/mach-bf537/boards/tcm_bf537.c

+1 −2
Original line number Diff line number Diff line
@@ -589,7 +589,6 @@ static struct platform_device bfin_mac_device = { 


static struct pata_platform_info bfin_pata_platform_data = {

	.ioport_shift = 2,

	.irq_type = IRQF_TRIGGER_HIGH,

};



static struct resource bfin_pata_resources[] = {
@@ -606,7 +605,7 @@ static struct resource bfin_pata_resources[] = { 
	{

		.start = PATA_INT,

		.end = PATA_INT,

		.flags = IORESOURCE_IRQ,

		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,

	},

};