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Commit d8b74276 authored by Aaro Koskinen's avatar Aaro Koskinen Committed by Ralf Baechle
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MIPS: cavium-octeon: fix I/O space setup on non-PCI systems 



Fix I/O space setup, so that on non-PCI systems using inb()/outb()
won't crash the system. Some drivers may try to probe I/O space and for
that purpose we can just allocate some normal memory initially. Drivers
trying to reserve a region will fail early as we set the size to 0. If
a real I/O space is present, the PCI/PCIe support code will re-adjust
the values accordingly.

Tested with EdgeRouter Lite by enabling CONFIG_SERIO_I8042 that caused
the originally reported crash.

Reported-by: default avatarFaidon Liambotis <paravoid@debian.org>
Signed-off-by: default avatarAaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: default avatarDavid Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5626/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 83eefabf

arch/mips/cavium-octeon/setup.c

+28 −0
Original line number Original line Diff line number Diff line
@@ -8,6 +8,7 @@ 
 *   written by Ralf Baechle <ralf@linux-mips.org>

 *   written by Ralf Baechle <ralf@linux-mips.org>

 */

 */

#include <linux/compiler.h>

#include <linux/compiler.h>

#include <linux/vmalloc.h>

#include <linux/init.h>

#include <linux/init.h>

#include <linux/kernel.h>

#include <linux/kernel.h>

#include <linux/console.h>

#include <linux/console.h>
@@ -1139,3 +1140,30 @@ static int __init edac_devinit(void) 
	return err;

	return err;

}

}

device_initcall(edac_devinit);

device_initcall(edac_devinit);



static void __initdata *octeon_dummy_iospace;



static int __init octeon_no_pci_init(void)

{

	/*

	 * Initially assume there is no PCI. The PCI/PCIe platform code will

	 * later re-initialize these to correct values if they are present.

	 */

	octeon_dummy_iospace = vzalloc(IO_SPACE_LIMIT);

	set_io_port_base((unsigned long)octeon_dummy_iospace);

	ioport_resource.start = MAX_RESOURCE;

	ioport_resource.end = 0;

	return 0;

}

core_initcall(octeon_no_pci_init);



static int __init octeon_no_pci_release(void)

{

	/*

	 * Release the allocated memory if a real IO space is there.

	 */

	if ((unsigned long)octeon_dummy_iospace != mips_io_port_base)

		vfree(octeon_dummy_iospace);

	return 0;

}

late_initcall(octeon_no_pci_release);

arch/mips/pci/pci-octeon.c

+5 −4
Original line number Original line Diff line number Diff line
@@ -586,15 +586,16 @@ static int __init octeon_pci_setup(void) 
	else

	else

		octeon_dma_bar_type = OCTEON_DMA_BAR_TYPE_BIG;

		octeon_dma_bar_type = OCTEON_DMA_BAR_TYPE_BIG;





	/* PCI I/O and PCI MEM values */

	set_io_port_base(OCTEON_PCI_IOSPACE_BASE);

	ioport_resource.start = 0;

	ioport_resource.end = OCTEON_PCI_IOSPACE_SIZE - 1;

	if (!octeon_is_pci_host()) {

	if (!octeon_is_pci_host()) {

		pr_notice("Not in host mode, PCI Controller not initialized\n");

		pr_notice("Not in host mode, PCI Controller not initialized\n");

		return 0;

		return 0;

	}

	}





	/* PCI I/O and PCI MEM values */

	set_io_port_base(OCTEON_PCI_IOSPACE_BASE);

	ioport_resource.start = 0;

	ioport_resource.end = OCTEON_PCI_IOSPACE_SIZE - 1;



	pr_notice("%s Octeon big bar support\n",

	pr_notice("%s Octeon big bar support\n",

		  (octeon_dma_bar_type ==

		  (octeon_dma_bar_type ==

		  OCTEON_DMA_BAR_TYPE_BIG) ? "Enabling" : "Disabling");

		  OCTEON_DMA_BAR_TYPE_BIG) ? "Enabling" : "Disabling");