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Commit d7c5d0dc authored by Catalin Marinas's avatar Catalin Marinas Committed by Russell King
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ARM: 7077/1: LPAE: Use a mask for physical addresses in page table entries 



With LPAE, the physical address mask is 40-bit while the page table
entry is 64-bit. This patch introduces PHYS_MASK for the 2-level page
table format, defined as ~0UL.

Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 442e70c0

arch/arm/include/asm/pgtable-2level-hwdef.h

+2 −0
Original line number Diff line number Diff line
@@ -88,4 +88,6 @@ 
#define PTE_SMALL_AP_URO_SRW	(_AT(pteval_t, 0xaa) << 4)

#define PTE_SMALL_AP_URW_SRW	(_AT(pteval_t, 0xff) << 4)



#define PHYS_MASK		(~0UL)



#endif

arch/arm/include/asm/pgtable.h

+3 −3
Original line number Diff line number Diff line
@@ -196,10 +196,10 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; 


static inline pte_t *pmd_page_vaddr(pmd_t pmd)

{

	return __va(pmd_val(pmd) & PAGE_MASK);

	return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK);

}



#define pmd_page(pmd)		pfn_to_page(__phys_to_pfn(pmd_val(pmd)))

#define pmd_page(pmd)		pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))



/* we don't need complex calculations here as the pmd is folded into the pgd */

#define pmd_addr_end(addr,end)	(end)
@@ -220,7 +220,7 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd) 
#define pte_offset_map(pmd,addr)	(__pte_map(pmd) + pte_index(addr))

#define pte_unmap(pte)			__pte_unmap(pte)



#define pte_pfn(pte)		(pte_val(pte) >> PAGE_SHIFT)

#define pte_pfn(pte)		((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)

#define pfn_pte(pfn,prot)	__pte(__pfn_to_phys(pfn) | pgprot_val(prot))



#define pte_page(pte)		pfn_to_page(pte_pfn(pte))