Commit d721b02f authored Aug 08, 2016 by Ville Syrjälä

drm/i915: Account for TSEG size when determining 865G stolen base



Looks like the TSEG lives just above TOUD, stolen comes after TSEG.

The spec seems somewhat self-contradictory in places, in the ESMRAMC
register desctription it says:
 TSEG Size:
  10=(TOUD + 512 KB) to TOUD
  11 =(TOUD + 1 MB) to TOUD

so that agrees with TSEG being at TOUD. But the example given
elsehwere in the spec says:

 TOUD equals 62.5 MB = 03E7FFFFh
 TSEG selected as 512 KB in size,
 Graphics local memory selected as 1 MB in size
 General System RAM available in system = 62.5 MB
 General system RAM range00000000h to 03E7FFFFh
 TSEG address range03F80000h to 03FFFFFFh
 TSEG pre-allocated from03F80000h to 03FFFFFFh
 Graphics local memory pre-allocated from03E80000h to 03F7FFFFh

so here we have TSEG above stolen.

Real world evidence agrees with the TOUD->TSEG->stolen order however, so
let's fix up the code to account for the TSEG size.

Cc: Taketo Kabe <fdporg@vega.pgw.jp>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org
Cc: stable@vger.kernel.org
Fixes: 0ad98c74 ("drm/i915: Determine the stolen memory base address on gen2")
Fixes: a4dff769 ("x86/gpu: Add Intel graphics stolen memory quirk for gen2 platforms")
Reported-by: Taketo Kabe <fdporg@vega.pgw.jp>
Tested-by: Taketo Kabe <fdporg@vega.pgw.jp>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96473


Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1470653919-27251-1-git-send-email-ville.syrjala@linux.intel.com
Link: http://download.intel.com/design/chipsets/datashts/25251405.pdf


Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

parent 5e334c19

arch/x86/kernel/early-quirks.c

+2 −7

Original line number	Diff line number	Diff line
		@@ -317,16 +317,11 @@ static phys_addr_t __init i85x_stolen_base(int num, int slot, int func,
		static phys_addr_t __init i865_stolen_base(int num, int slot, int func,
		size_t stolen_size)
		{
		u16 toud;
		u16 toud = 0;

		/*
		* FIXME is the graphics stolen memory region
		* always at TOUD? Ie. is it always the last
		* one to be allocated by the BIOS?
		*/
		toud = read_pci_config_16(0, 0, 0, I865_TOUD);

		return (phys_addr_t)toud << 16;
		return (phys_addr_t)(toud << 16) + i845_tseg_size();
		}

		static phys_addr_t __init gen3_stolen_base(int num, int slot, int func,

drivers/gpu/drm/i915/i915_gem_stolen.c

+17 −6

Original line number	Diff line number	Diff line
		@@ -115,17 +115,28 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)

		base = bsm & INTEL_BSM_MASK;
		} else if (IS_I865G(dev)) {
		u32 tseg_size = 0;
		u16 toud = 0;
		u8 tmp;

		pci_bus_read_config_byte(dev->pdev->bus, PCI_DEVFN(0, 0),
		I845_ESMRAMC, &tmp);

		if (tmp & TSEG_ENABLE) {
		switch (tmp & I845_TSEG_SIZE_MASK) {
		case I845_TSEG_SIZE_512K:
		tseg_size = KB(512);
		break;
		case I845_TSEG_SIZE_1M:
		tseg_size = MB(1);
		break;
		}
		}

		/*
		* FIXME is the graphics stolen memory region
		* always at TOUD? Ie. is it always the last
		* one to be allocated by the BIOS?
		*/
		pci_bus_read_config_word(dev->pdev->bus, PCI_DEVFN(0, 0),
		I865_TOUD, &toud);

		base = toud << 16;
		base = (toud << 16) + tseg_size;
		} else if (IS_I85X(dev)) {
		u32 tseg_size = 0;
		u32 tom;