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Commit d6e15d78 authored by Russell King's avatar Russell King
Browse files

clocksource: convert SPEAr platforms 16-bit up counting clocksource 



Convert SPEAr platforms 16-bit up counting clocksource, which requires
a 16-bit register access read rather than 32-bit.

Acked-by: default avatarViresh Kumar <viresh.kumar@st.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent c5039f52

arch/arm/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -884,6 +884,7 @@ config PLAT_SPEAR 
	select ARM_AMBA

	select ARCH_REQUIRE_GPIOLIB

	select CLKDEV_LOOKUP

	select CLKSRC_MMIO

	select GENERIC_CLOCKEVENTS

	select HAVE_CLK

	help

arch/arm/plat-spear/time.c

+2 −14
Original line number Diff line number Diff line
@@ -70,19 +70,6 @@ static void clockevent_set_mode(enum clock_event_mode mode, 
static int clockevent_next_event(unsigned long evt,

				 struct clock_event_device *clk_event_dev);



static cycle_t clocksource_read_cycles(struct clocksource *cs)

{

	return (cycle_t) readw(gpt_base + COUNT(CLKSRC));

}



static struct clocksource clksrc = {

	.name = "tmr1",

	.rating = 200,		/* its a pretty decent clock */

	.read = clocksource_read_cycles,

	.mask = 0xFFFF,		/* 16 bits */

	.flags = CLOCK_SOURCE_IS_CONTINUOUS,

};



static void spear_clocksource_init(void)

{

	u32 tick_rate;
@@ -103,7 +90,8 @@ static void spear_clocksource_init(void) 
	writew(val, gpt_base + CR(CLKSRC));



	/* register the clocksource */

	clocksource_register_hz(&clksrc, tick_rate);

	clocksource_mmio_init(gpt_base + COUNT(CLKSRC), "tmr1", tick_rate,

		200, 16, clocksource_mmio_readw_up);

}



static struct clock_event_device clkevt = {