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Commit d62caabb authored by Andrey Smetanin's avatar Andrey Smetanin Committed by Paolo Bonzini
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kvm/x86: per-vcpu apicv deactivation support 



The decision on whether to use hardware APIC virtualization used to be
taken globally, based on the availability of the feature in the CPU
and the value of a module parameter.

However, under certain circumstances we want to control it on per-vcpu
basis.  In particular, when the userspace activates HyperV synthetic
interrupt controller (SynIC), APICv has to be disabled as it's
incompatible with SynIC auto-EOI behavior.

To achieve that, introduce 'apicv_active' flag on struct
kvm_vcpu_arch, and kvm_vcpu_deactivate_apicv() function to turn APICv
off.  The flag is initialized based on the module parameter and CPU
capability, and consulted whenever an APICv-specific action is
performed.

Signed-off-by: default avatarAndrey Smetanin <asmetanin@virtuozzo.com>
Reviewed-by: default avatarRoman Kagan <rkagan@virtuozzo.com>
Signed-off-by: default avatarDenis V. Lunev <den@openvz.org>
CC: Gleb Natapov <gleb@kernel.org>
CC: Paolo Bonzini <pbonzini@redhat.com>
CC: Roman Kagan <rkagan@virtuozzo.com>
CC: Denis V. Lunev <den@openvz.org>
CC: qemu-devel@nongnu.org
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 6308630b

arch/x86/include/asm/kvm_host.h

+5 −1
Original line number Diff line number Diff line
@@ -400,6 +400,7 @@ struct kvm_vcpu_arch { 
	u64 efer;

	u64 apic_base;

	struct kvm_lapic *apic;    /* kernel irqchip context */

	bool apicv_active;

	DECLARE_BITMAP(ioapic_handled_vectors, 256);

	unsigned long apic_attention;

	int32_t apic_arb_prio;
@@ -831,7 +832,8 @@ struct kvm_x86_ops { 
	void (*enable_nmi_window)(struct kvm_vcpu *vcpu);

	void (*enable_irq_window)(struct kvm_vcpu *vcpu);

	void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);

	int (*cpu_uses_apicv)(struct kvm_vcpu *vcpu);

	bool (*get_enable_apicv)(void);

	void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);

	void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);

	void (*hwapic_isr_update)(struct kvm *kvm, int isr);

	void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
@@ -1086,6 +1088,8 @@ gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 
gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,

				struct x86_exception *exception);



void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu);



int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);



int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,

arch/x86/kvm/irq.c

+1 −1
Original line number Diff line number Diff line
@@ -76,7 +76,7 @@ int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v) 
	if (kvm_cpu_has_extint(v))

		return 1;



	if (kvm_vcpu_apic_vid_enabled(v))

	if (kvm_vcpu_apicv_active(v))

		return 0;



	return kvm_apic_has_interrupt(v) != -1; /* LAPIC */

arch/x86/kvm/lapic.c

+12 −11
Original line number Diff line number Diff line
@@ -379,6 +379,7 @@ static inline int apic_find_highest_irr(struct kvm_lapic *apic) 
	if (!apic->irr_pending)

		return -1;



	if (apic->vcpu->arch.apicv_active)

		kvm_x86_ops->sync_pir_to_irr(apic->vcpu);

	result = apic_search_irr(apic);

	ASSERT(result == -1 || result >= 16);
@@ -392,7 +393,7 @@ static inline void apic_clear_irr(int vec, struct kvm_lapic *apic) 


	vcpu = apic->vcpu;



	if (unlikely(kvm_vcpu_apic_vid_enabled(vcpu))) {

	if (unlikely(vcpu->arch.apicv_active)) {

		/* try to update RVI */

		apic_clear_vector(vec, apic->regs + APIC_IRR);

		kvm_make_request(KVM_REQ_EVENT, vcpu);
@@ -418,7 +419,7 @@ static inline void apic_set_isr(int vec, struct kvm_lapic *apic) 
	 * because the processor can modify ISR under the hood.  Instead

	 * just set SVI.

	 */

	if (unlikely(kvm_x86_ops->hwapic_isr_update))

	if (unlikely(vcpu->arch.apicv_active))

		kvm_x86_ops->hwapic_isr_update(vcpu->kvm, vec);

	else {

		++apic->isr_count;
@@ -466,7 +467,7 @@ static inline void apic_clear_isr(int vec, struct kvm_lapic *apic) 
	 * on the other hand isr_count and highest_isr_cache are unused

	 * and must be left alone.

	 */

	if (unlikely(kvm_x86_ops->hwapic_isr_update))

	if (unlikely(vcpu->arch.apicv_active))

		kvm_x86_ops->hwapic_isr_update(vcpu->kvm,

					       apic_find_highest_isr(apic));

	else {
@@ -852,7 +853,7 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode, 
				apic_clear_vector(vector, apic->regs + APIC_TMR);

		}



		if (kvm_x86_ops->deliver_posted_interrupt)

		if (vcpu->arch.apicv_active)

			kvm_x86_ops->deliver_posted_interrupt(vcpu, vector);

		else {

			apic_set_irr(vector, apic);
@@ -1225,7 +1226,7 @@ static bool lapic_timer_int_injected(struct kvm_vcpu *vcpu) 
		int vec = reg & APIC_VECTOR_MASK;

		void *bitmap = apic->regs + APIC_ISR;



		if (kvm_x86_ops->deliver_posted_interrupt)

		if (vcpu->arch.apicv_active)

			bitmap = apic->regs + APIC_IRR;



		if (apic_test_vector(vec, bitmap))
@@ -1693,8 +1694,8 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event) 
		apic_set_reg(apic, APIC_ISR + 0x10 * i, 0);

		apic_set_reg(apic, APIC_TMR + 0x10 * i, 0);

	}

	apic->irr_pending = kvm_vcpu_apic_vid_enabled(vcpu);

	apic->isr_count = kvm_x86_ops->hwapic_isr_update ? 1 : 0;

	apic->irr_pending = vcpu->arch.apicv_active;

	apic->isr_count = vcpu->arch.apicv_active ? 1 : 0;

	apic->highest_isr_cache = -1;

	update_divide_count(apic);

	atomic_set(&apic->lapic_timer.pending, 0);
@@ -1906,15 +1907,15 @@ void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu, 
	update_divide_count(apic);

	start_apic_timer(apic);

	apic->irr_pending = true;

	apic->isr_count = kvm_x86_ops->hwapic_isr_update ?

	apic->isr_count = vcpu->arch.apicv_active ?

				1 : count_vectors(apic->regs + APIC_ISR);

	apic->highest_isr_cache = -1;

	if (kvm_x86_ops->hwapic_irr_update)

	if (vcpu->arch.apicv_active) {

		kvm_x86_ops->hwapic_irr_update(vcpu,

				apic_find_highest_irr(apic));

	if (unlikely(kvm_x86_ops->hwapic_isr_update))

		kvm_x86_ops->hwapic_isr_update(vcpu->kvm,

				apic_find_highest_isr(apic));

	}

	kvm_make_request(KVM_REQ_EVENT, vcpu);

	if (ioapic_in_kernel(vcpu->kvm))

		kvm_rtc_eoi_tracking_restore_one(vcpu);

arch/x86/kvm/lapic.h

+2 −2
Original line number Diff line number Diff line
@@ -143,9 +143,9 @@ static inline int apic_x2apic_mode(struct kvm_lapic *apic) 
	return apic->vcpu->arch.apic_base & X2APIC_ENABLE;

}



static inline bool kvm_vcpu_apic_vid_enabled(struct kvm_vcpu *vcpu)

static inline bool kvm_vcpu_apicv_active(struct kvm_vcpu *vcpu)

{

	return kvm_x86_ops->cpu_uses_apicv(vcpu);

	return vcpu->arch.apic && vcpu->arch.apicv_active;

}



static inline bool kvm_apic_has_events(struct kvm_vcpu *vcpu)

arch/x86/kvm/svm.c

+8 −3
Original line number Diff line number Diff line
@@ -3559,9 +3559,13 @@ static void svm_set_virtual_x2apic_mode(struct kvm_vcpu *vcpu, bool set) 
	return;

}



static int svm_cpu_uses_apicv(struct kvm_vcpu *vcpu)

static bool svm_get_enable_apicv(void)

{

	return false;

}



static void svm_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu)

{

	return 0;

}



static void svm_load_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap)
@@ -4328,7 +4332,8 @@ static struct kvm_x86_ops svm_x86_ops = { 
	.enable_irq_window = enable_irq_window,

	.update_cr8_intercept = update_cr8_intercept,

	.set_virtual_x2apic_mode = svm_set_virtual_x2apic_mode,

	.cpu_uses_apicv = svm_cpu_uses_apicv,

	.get_enable_apicv = svm_get_enable_apicv,

	.refresh_apicv_exec_ctrl = svm_refresh_apicv_exec_ctrl,

	.load_eoi_exitmap = svm_load_eoi_exitmap,

	.sync_pir_to_irr = svm_sync_pir_to_irr,