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Commit d5580ade authored by Gabor Juhos's avatar Gabor Juhos Committed by John W. Linville
Browse files

rt2x00: rt2800pci: move queue functions to the rt2800mmio module 



Move the functions into a separate module, in order
to make those usable from other modules. Also move
the queue register offset macros from rt2800pci.h
into rt2800mmio.h.

Signed-off-by: default avatarGabor Juhos <juhosg@openwrt.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 51e62469

drivers/net/wireless/rt2x00/rt2800mmio.c

+137 −0
Original line number Diff line number Diff line
@@ -552,6 +552,143 @@ void rt2800mmio_toggle_irq(struct rt2x00_dev *rt2x00dev, 
}

EXPORT_SYMBOL_GPL(rt2800mmio_toggle_irq);



/*

 * Queue handlers.

 */

void rt2800mmio_start_queue(struct data_queue *queue)

{

	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;

	u32 reg;



	switch (queue->qid) {

	case QID_RX:

		rt2x00mmio_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);

		rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 1);

		rt2x00mmio_register_write(rt2x00dev, MAC_SYS_CTRL, reg);

		break;

	case QID_BEACON:

		rt2x00mmio_register_read(rt2x00dev, BCN_TIME_CFG, &reg);

		rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);

		rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);

		rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 1);

		rt2x00mmio_register_write(rt2x00dev, BCN_TIME_CFG, reg);



		rt2x00mmio_register_read(rt2x00dev, INT_TIMER_EN, &reg);

		rt2x00_set_field32(&reg, INT_TIMER_EN_PRE_TBTT_TIMER, 1);

		rt2x00mmio_register_write(rt2x00dev, INT_TIMER_EN, reg);

		break;

	default:

		break;

	}

}

EXPORT_SYMBOL_GPL(rt2800mmio_start_queue);



void rt2800mmio_kick_queue(struct data_queue *queue)

{

	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;

	struct queue_entry *entry;



	switch (queue->qid) {

	case QID_AC_VO:

	case QID_AC_VI:

	case QID_AC_BE:

	case QID_AC_BK:

		entry = rt2x00queue_get_entry(queue, Q_INDEX);

		rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(queue->qid),

					  entry->entry_idx);

		break;

	case QID_MGMT:

		entry = rt2x00queue_get_entry(queue, Q_INDEX);

		rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(5),

					  entry->entry_idx);

		break;

	default:

		break;

	}

}

EXPORT_SYMBOL_GPL(rt2800mmio_kick_queue);



void rt2800mmio_stop_queue(struct data_queue *queue)

{

	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;

	u32 reg;



	switch (queue->qid) {

	case QID_RX:

		rt2x00mmio_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);

		rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 0);

		rt2x00mmio_register_write(rt2x00dev, MAC_SYS_CTRL, reg);

		break;

	case QID_BEACON:

		rt2x00mmio_register_read(rt2x00dev, BCN_TIME_CFG, &reg);

		rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 0);

		rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 0);

		rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);

		rt2x00mmio_register_write(rt2x00dev, BCN_TIME_CFG, reg);



		rt2x00mmio_register_read(rt2x00dev, INT_TIMER_EN, &reg);

		rt2x00_set_field32(&reg, INT_TIMER_EN_PRE_TBTT_TIMER, 0);

		rt2x00mmio_register_write(rt2x00dev, INT_TIMER_EN, reg);



		/*

		 * Wait for current invocation to finish. The tasklet

		 * won't be scheduled anymore afterwards since we disabled

		 * the TBTT and PRE TBTT timer.

		 */

		tasklet_kill(&rt2x00dev->tbtt_tasklet);

		tasklet_kill(&rt2x00dev->pretbtt_tasklet);



		break;

	default:

		break;

	}

}

EXPORT_SYMBOL_GPL(rt2800mmio_stop_queue);



void rt2800mmio_queue_init(struct data_queue *queue)

{

	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;

	unsigned short txwi_size, rxwi_size;



	rt2800_get_txwi_rxwi_size(rt2x00dev, &txwi_size, &rxwi_size);



	switch (queue->qid) {

	case QID_RX:

		queue->limit = 128;

		queue->data_size = AGGREGATION_SIZE;

		queue->desc_size = RXD_DESC_SIZE;

		queue->winfo_size = rxwi_size;

		queue->priv_size = sizeof(struct queue_entry_priv_mmio);

		break;



	case QID_AC_VO:

	case QID_AC_VI:

	case QID_AC_BE:

	case QID_AC_BK:

		queue->limit = 64;

		queue->data_size = AGGREGATION_SIZE;

		queue->desc_size = TXD_DESC_SIZE;

		queue->winfo_size = txwi_size;

		queue->priv_size = sizeof(struct queue_entry_priv_mmio);

		break;



	case QID_BEACON:

		queue->limit = 8;

		queue->data_size = 0; /* No DMA required for beacons */

		queue->desc_size = TXD_DESC_SIZE;

		queue->winfo_size = txwi_size;

		queue->priv_size = sizeof(struct queue_entry_priv_mmio);

		break;



	case QID_ATIM:

		/* fallthrough */

	default:

		BUG();

		break;

	}

}

EXPORT_SYMBOL_GPL(rt2800mmio_queue_init);



MODULE_AUTHOR(DRV_PROJECT);

MODULE_VERSION(DRV_VERSION);

MODULE_DESCRIPTION("rt2800 MMIO library");

drivers/net/wireless/rt2x00/rt2800mmio.h

+15 −0
Original line number Diff line number Diff line
@@ -31,6 +31,15 @@ 
#ifndef RT2800MMIO_H

#define RT2800MMIO_H



/*

 * Queue register offset macros

 */

#define TX_QUEUE_REG_OFFSET	0x10

#define TX_BASE_PTR(__x)	(TX_BASE_PTR0 + ((__x) * TX_QUEUE_REG_OFFSET))

#define TX_MAX_CNT(__x)		(TX_MAX_CNT0 + ((__x) * TX_QUEUE_REG_OFFSET))

#define TX_CTX_IDX(__x)		(TX_CTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET))

#define TX_DTX_IDX(__x)		(TX_DTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET))



/*

 * DMA descriptor defines.

 */
@@ -138,4 +147,10 @@ irqreturn_t rt2800mmio_interrupt(int irq, void *dev_instance); 
void rt2800mmio_toggle_irq(struct rt2x00_dev *rt2x00dev,

			   enum dev_state state);



/* Queue handlers */

void rt2800mmio_start_queue(struct data_queue *queue);

void rt2800mmio_kick_queue(struct data_queue *queue);

void rt2800mmio_stop_queue(struct data_queue *queue);

void rt2800mmio_queue_init(struct data_queue *queue);



#endif /* RT2800MMIO_H */

drivers/net/wireless/rt2x00/rt2800pci.c

+0 −133
Original line number Diff line number Diff line
@@ -201,96 +201,6 @@ static inline int rt2800pci_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev) 
}

#endif /* CONFIG_PCI */



/*

 * Queue handlers.

 */

static void rt2800mmio_start_queue(struct data_queue *queue)

{

	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;

	u32 reg;



	switch (queue->qid) {

	case QID_RX:

		rt2x00mmio_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);

		rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 1);

		rt2x00mmio_register_write(rt2x00dev, MAC_SYS_CTRL, reg);

		break;

	case QID_BEACON:

		rt2x00mmio_register_read(rt2x00dev, BCN_TIME_CFG, &reg);

		rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);

		rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);

		rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 1);

		rt2x00mmio_register_write(rt2x00dev, BCN_TIME_CFG, reg);



		rt2x00mmio_register_read(rt2x00dev, INT_TIMER_EN, &reg);

		rt2x00_set_field32(&reg, INT_TIMER_EN_PRE_TBTT_TIMER, 1);

		rt2x00mmio_register_write(rt2x00dev, INT_TIMER_EN, reg);

		break;

	default:

		break;

	}

}



static void rt2800mmio_kick_queue(struct data_queue *queue)

{

	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;

	struct queue_entry *entry;



	switch (queue->qid) {

	case QID_AC_VO:

	case QID_AC_VI:

	case QID_AC_BE:

	case QID_AC_BK:

		entry = rt2x00queue_get_entry(queue, Q_INDEX);

		rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(queue->qid),

					  entry->entry_idx);

		break;

	case QID_MGMT:

		entry = rt2x00queue_get_entry(queue, Q_INDEX);

		rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(5),

					  entry->entry_idx);

		break;

	default:

		break;

	}

}



static void rt2800mmio_stop_queue(struct data_queue *queue)

{

	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;

	u32 reg;



	switch (queue->qid) {

	case QID_RX:

		rt2x00mmio_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);

		rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 0);

		rt2x00mmio_register_write(rt2x00dev, MAC_SYS_CTRL, reg);

		break;

	case QID_BEACON:

		rt2x00mmio_register_read(rt2x00dev, BCN_TIME_CFG, &reg);

		rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 0);

		rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 0);

		rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);

		rt2x00mmio_register_write(rt2x00dev, BCN_TIME_CFG, reg);



		rt2x00mmio_register_read(rt2x00dev, INT_TIMER_EN, &reg);

		rt2x00_set_field32(&reg, INT_TIMER_EN_PRE_TBTT_TIMER, 0);

		rt2x00mmio_register_write(rt2x00dev, INT_TIMER_EN, reg);



		/*

		 * Wait for current invocation to finish. The tasklet

		 * won't be scheduled anymore afterwards since we disabled

		 * the TBTT and PRE TBTT timer.

		 */

		tasklet_kill(&rt2x00dev->tbtt_tasklet);

		tasklet_kill(&rt2x00dev->pretbtt_tasklet);



		break;

	default:

		break;

	}

}



/*

 * Firmware functions

 */
@@ -689,49 +599,6 @@ static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = { 
	.sta_remove		= rt2800_sta_remove,

};



static void rt2800mmio_queue_init(struct data_queue *queue)

{

	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;

	unsigned short txwi_size, rxwi_size;



	rt2800_get_txwi_rxwi_size(rt2x00dev, &txwi_size, &rxwi_size);



	switch (queue->qid) {

	case QID_RX:

		queue->limit = 128;

		queue->data_size = AGGREGATION_SIZE;

		queue->desc_size = RXD_DESC_SIZE;

		queue->winfo_size = rxwi_size;

		queue->priv_size = sizeof(struct queue_entry_priv_mmio);

		break;



	case QID_AC_VO:

	case QID_AC_VI:

	case QID_AC_BE:

	case QID_AC_BK:

		queue->limit = 64;

		queue->data_size = AGGREGATION_SIZE;

		queue->desc_size = TXD_DESC_SIZE;

		queue->winfo_size = txwi_size;

		queue->priv_size = sizeof(struct queue_entry_priv_mmio);

		break;



	case QID_BEACON:

		queue->limit = 8;

		queue->data_size = 0; /* No DMA required for beacons */

		queue->desc_size = TXD_DESC_SIZE;

		queue->winfo_size = txwi_size;

		queue->priv_size = sizeof(struct queue_entry_priv_mmio);

		break;



	case QID_ATIM:

		/* fallthrough */

	default:

		BUG();

		break;

	}

}



static const struct rt2x00_ops rt2800pci_ops = {

	.name			= KBUILD_MODNAME,

	.drv_data_size		= sizeof(struct rt2800_drv_data),

drivers/net/wireless/rt2x00/rt2800pci.h

+0 −9
Original line number Diff line number Diff line
@@ -34,15 +34,6 @@ 
#ifndef RT2800PCI_H

#define RT2800PCI_H



/*

 * Queue register offset macros

 */

#define TX_QUEUE_REG_OFFSET		0x10

#define TX_BASE_PTR(__x)		(TX_BASE_PTR0 + ((__x) * TX_QUEUE_REG_OFFSET))

#define TX_MAX_CNT(__x)			(TX_MAX_CNT0 + ((__x) * TX_QUEUE_REG_OFFSET))

#define TX_CTX_IDX(__x)			(TX_CTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET))

#define TX_DTX_IDX(__x)			(TX_DTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET))



/*

 * 8051 firmware image.

 */