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Commit d4c5f43d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-for-v4.9-rc4' of git://people.freedesktop.org/~airlied/linux 

Pull drm fixes from Dave Airlie:
 "Fixes for amdgpu, radeon, intel, imx and virtio-gpu.

  This is a bit larger than I'd like, but I had some stuff I meant to
  send for -rc3 but was waiting for the PAT regression fix to land. So
  this is really fixes for rc3 and rc4 in one go.

  There are a set of fixes for an oops we've been seeing around MST
  display unplug, along with more suspend/resume and shutdown fixes for
  amdgpu, one power management follow on fix for nouveau, and set of imx
  fixes, and a single virtio-gpu regression fix"

* tag 'drm-fixes-for-v4.9-rc4' of git://people.freedesktop.org/~airlied/linux: (54 commits)
  virtio-gpu: fix vblank events
  drm/nouveau/acpi: fix check for power resources support
  drm/i915: Fix SKL+ 90/270 degree rotated plane coordinate computation
  drm/i915: Remove two invalid warns
  drm/i915: Rotated view does not need a fence
  drm/i915/fbc: fix CFB size calculation for gen8+
  drm: i915: Wait for fences on new fb, not old
  drm/i915: Clean up DDI DDC/AUX CH sanitation
  drm/i915: Respect alternate_aux_channel for all DDI ports
  drm/i915/gen9: fix watermarks when using the pipe scaler
  drm/i915: Fix mismatched INIT power domain disabling during suspend
  drm/i915: fix a read size argument
  drm/i915: Use fence_write() from rpm resume
  drm/i915/gen9: fix DDB partitioning for multi-screen cases
  drm/i915: workaround sparse warning on variable length arrays
  drm/i915: keep declarations in i915_drv.h
  drm/amd/powerplay: fix bug get wrong evv voltage of Polaris.
  drm/amdgpu/si_dpm: workaround for SI kickers
  drm/radeon/si_dpm: workaround for SI kickers
  drm/amdgpu: fix s3 resume back, uvd dpm randomly can't disable.
  ...
parents 66cecb67 7ec30fca

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+2 −1
Original line number Diff line number Diff line
@@ -519,6 +519,7 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p, 
		r = ttm_eu_reserve_buffers(&p->ticket, &p->validated, true,

					   &duplicates);

		if (unlikely(r != 0)) {

			if (r != -ERESTARTSYS)

				DRM_ERROR("ttm_eu_reserve_buffers failed.\n");

			goto error_free_pages;

		}

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+4 −5
Original line number Diff line number Diff line
@@ -1959,6 +1959,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool suspend, bool fbcon) 
	/* evict remaining vram memory */

	amdgpu_bo_evict_vram(adev);



	amdgpu_atombios_scratch_regs_save(adev);

	pci_save_state(dev->pdev);

	if (suspend) {

		/* Shut down the device */
@@ -2010,6 +2011,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool resume, bool fbcon) 
			return r;

		}

	}

	amdgpu_atombios_scratch_regs_restore(adev);



	/* post card */

	if (!amdgpu_card_posted(adev) || !resume) {
@@ -2268,8 +2270,6 @@ int amdgpu_gpu_reset(struct amdgpu_device *adev) 
	}



	if (need_full_reset) {

		/* save scratch */

		amdgpu_atombios_scratch_regs_save(adev);

		r = amdgpu_suspend(adev);



retry:
@@ -2279,8 +2279,9 @@ int amdgpu_gpu_reset(struct amdgpu_device *adev) 
			amdgpu_display_stop_mc_access(adev, &save);

			amdgpu_wait_for_idle(adev, AMD_IP_BLOCK_TYPE_GMC);

		}



		amdgpu_atombios_scratch_regs_save(adev);

		r = amdgpu_asic_reset(adev);

		amdgpu_atombios_scratch_regs_restore(adev);

		/* post card */

		amdgpu_atom_asic_init(adev->mode_info.atom_context);
@@ -2288,8 +2289,6 @@ int amdgpu_gpu_reset(struct amdgpu_device *adev) 
			dev_info(adev->dev, "GPU reset succeeded, trying to resume\n");

			r = amdgpu_resume(adev);

		}

		/* restore scratch */

		amdgpu_atombios_scratch_regs_restore(adev);

	}

	if (!r) {

		amdgpu_irq_gpu_reset_resume_helper(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

+1 −0
Original line number Diff line number Diff line
@@ -68,6 +68,7 @@ int amdgpu_fence_slab_init(void) 


void amdgpu_fence_slab_fini(void)

{

	rcu_barrier();

	kmem_cache_destroy(amdgpu_fence_slab);

}

/*

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c

+2 −0
Original line number Diff line number Diff line
@@ -239,6 +239,7 @@ int amdgpu_irq_init(struct amdgpu_device *adev) 
	if (r) {

		adev->irq.installed = false;

		flush_work(&adev->hotplug_work);

		cancel_work_sync(&adev->reset_work);

		return r;

	}
@@ -264,6 +265,7 @@ void amdgpu_irq_fini(struct amdgpu_device *adev) 
		if (adev->irq.msi_enabled)

			pci_disable_msi(adev->pdev);

		flush_work(&adev->hotplug_work);

		cancel_work_sync(&adev->reset_work);

	}



	for (i = 0; i < AMDGPU_MAX_IRQ_SRC_ID; ++i) {

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

+2 −4
Original line number Diff line number Diff line
@@ -459,10 +459,8 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file 
		/* return all clocks in KHz */

		dev_info.gpu_counter_freq = amdgpu_asic_get_xclk(adev) * 10;

		if (adev->pm.dpm_enabled) {

			dev_info.max_engine_clock =

				adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk * 10;

			dev_info.max_memory_clock =

				adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk * 10;

			dev_info.max_engine_clock = amdgpu_dpm_get_sclk(adev, false) * 10;

			dev_info.max_memory_clock = amdgpu_dpm_get_mclk(adev, false) * 10;

		} else {

			dev_info.max_engine_clock = adev->pm.default_sclk * 10;

			dev_info.max_memory_clock = adev->pm.default_mclk * 10;