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Commit d30982b9 authored by Ivan Khoronzhuk's avatar Ivan Khoronzhuk Committed by Santosh Shilimkar
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Documentation: dt: add bindings for keystone pll control controller



The main pll controller used to drive theC66x CorePacs, the switch fabric,
and a majority of the peripheral clocks (all but the ARM CorePacs, DDR3 and
the NETCP modules) requires a PLL Controller to manage the various clock
divisions, gating, and synchronization.

Reviewed-by: default avatarArnd Bergmann <arnd@arndb.de>
Acked-by: default avatarMike Turquette <mturquette@linaro.org>
Signed-off-by: default avatarIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
[santosh.shilimkar@ti.com: Fixed the subject line]
Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
parent caee0055
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* Device tree bindings for Texas Instruments keystone pll controller

The main pll controller used to drive theC66x CorePacs, the switch fabric,
and a majority of the peripheral clocks (all but the ARM CorePacs, DDR3 and
the NETCP modules) requires a PLL Controller to manage the various clock
divisions, gating, and synchronization.

Required properties:

- compatible:		"ti,keystone-pllctrl", "syscon"

- reg:			contains offset/length value for pll controller
			registers space.

Example:

pllctrl: pll-controller@0x02310000 {
	compatible = "ti,keystone-pllctrl", "syscon";
	reg = <0x02310000 0x200>;
};