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Commit d2fa7d32 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/disp: add a method to fetch info needed by drm vblank timestamping 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent eb2e9686

drivers/gpu/drm/nouveau/core/engine/disp/nv04.c

+37 −1
Original line number Diff line number Diff line
@@ -31,9 +31,45 @@ struct nv04_disp_priv { 
	struct nouveau_disp base;

};



static int

nv04_disp_scanoutpos(struct nouveau_object *object, u32 mthd,

		     void *data, u32 size)

{

	struct nv04_disp_priv *priv = (void *)object->engine;

	struct nv04_display_scanoutpos *args = data;

	const int head = (mthd & NV04_DISP_MTHD_HEAD);

	u32 line;



	if (size < sizeof(*args))

		return -EINVAL;



	args->vblanks = nv_rd32(priv, 0x680800 + (head * 0x2000)) & 0xffff;

	args->vtotal  = nv_rd32(priv, 0x680804 + (head * 0x2000)) & 0xffff;

	args->vblanke = args->vtotal - 1;



	args->hblanks = nv_rd32(priv, 0x680820 + (head * 0x2000)) & 0xffff;

	args->htotal  = nv_rd32(priv, 0x680824 + (head * 0x2000)) & 0xffff;

	args->hblanke = args->htotal - 1;



	args->time[0] = ktime_to_ns(ktime_get());

	line = nv_rd32(priv, 0x600868 + (head * 0x2000));

	args->time[1] = ktime_to_ns(ktime_get());

	args->hline = (line & 0xffff0000) >> 16;

	args->vline = (line & 0x0000ffff);

	return 0;

}



#define HEAD_MTHD(n) (n), (n) + 0x01



static struct nouveau_omthds

nv04_disp_omthds[] = {

	{ HEAD_MTHD(NV04_DISP_SCANOUTPOS), nv04_disp_scanoutpos },

	{}

};



static struct nouveau_oclass

nv04_disp_sclass[] = {

	{ NV04_DISP_CLASS, &nouveau_object_ofuncs },

	{ NV04_DISP_CLASS, &nouveau_object_ofuncs, nv04_disp_omthds },

	{},

};

drivers/gpu/drm/nouveau/core/engine/disp/nv50.c

+30 −0
Original line number Diff line number Diff line
@@ -541,6 +541,35 @@ nv50_disp_curs_ofuncs = { 
 * Base display object

 ******************************************************************************/



int

nv50_disp_base_scanoutpos(struct nouveau_object *object, u32 mthd,

			  void *data, u32 size)

{

	struct nv50_disp_priv *priv = (void *)object->engine;

	struct nv04_display_scanoutpos *args = data;

	const int head = (mthd & NV50_DISP_MTHD_HEAD);

	u32 blanke, blanks, total;



	if (size < sizeof(*args) || head >= priv->head.nr)

		return -EINVAL;

	blanke = nv_rd32(priv, 0x610aec + (head * 0x540));

	blanks = nv_rd32(priv, 0x610af4 + (head * 0x540));

	total  = nv_rd32(priv, 0x610afc + (head * 0x540));



	args->vblanke = (blanke & 0xffff0000) >> 16;

	args->hblanke = (blanke & 0x0000ffff);

	args->vblanks = (blanks & 0xffff0000) >> 16;

	args->hblanks = (blanks & 0x0000ffff);

	args->vtotal  = ( total & 0xffff0000) >> 16;

	args->htotal  = ( total & 0x0000ffff);



	args->time[0] = ktime_to_ns(ktime_get());

	args->vline   = nv_rd32(priv, 0x616340 + (head * 0x800)) & 0xffff;

	args->time[1] = ktime_to_ns(ktime_get()); /* vline read locks hline */

	args->hline   = nv_rd32(priv, 0x616344 + (head * 0x800)) & 0xffff;

	return 0;

}



static void

nv50_disp_base_vblank_enable(struct nouveau_event *event, int head)

{
@@ -675,6 +704,7 @@ nv50_disp_base_ofuncs = { 


static struct nouveau_omthds

nv50_disp_base_omthds[] = {

	{ HEAD_MTHD(NV50_DISP_SCANOUTPOS)     , nv50_disp_base_scanoutpos },

	{ SOR_MTHD(NV50_DISP_SOR_PWR)         , nv50_sor_mthd },

	{ SOR_MTHD(NV50_DISP_SOR_LVDS_SCRIPT) , nv50_sor_mthd },

	{ DAC_MTHD(NV50_DISP_DAC_PWR)         , nv50_dac_mthd },

drivers/gpu/drm/nouveau/core/engine/disp/nv50.h

+5 −2
Original line number Diff line number Diff line
@@ -43,6 +43,10 @@ struct nv50_disp_priv { 
	} pior;

};



#define HEAD_MTHD(n) (n), (n) + 0x03



int nv50_disp_base_scanoutpos(struct nouveau_object *, u32, void *, u32);



#define DAC_MTHD(n) (n), (n) + 0x03



int nv50_dac_mthd(struct nouveau_object *, u32, void *, u32);
@@ -132,13 +136,12 @@ void nv50_disp_intr(struct nouveau_subdev *); 


extern struct nouveau_omthds nv84_disp_base_omthds[];



extern struct nouveau_omthds nva3_disp_base_omthds[];



extern struct nouveau_ofuncs nvd0_disp_mast_ofuncs;

extern struct nouveau_ofuncs nvd0_disp_sync_ofuncs;

extern struct nouveau_ofuncs nvd0_disp_ovly_ofuncs;

extern struct nouveau_ofuncs nvd0_disp_oimm_ofuncs;

extern struct nouveau_ofuncs nvd0_disp_curs_ofuncs;

extern struct nouveau_omthds nvd0_disp_base_omthds[];

extern struct nouveau_ofuncs nvd0_disp_base_ofuncs;

extern struct nouveau_oclass nvd0_disp_cclass;

void nvd0_disp_intr_supervisor(struct work_struct *);

drivers/gpu/drm/nouveau/core/engine/disp/nv84.c

+1 −0
Original line number Diff line number Diff line
@@ -41,6 +41,7 @@ nv84_disp_sclass[] = { 


struct nouveau_omthds

nv84_disp_base_omthds[] = {

	{ HEAD_MTHD(NV50_DISP_SCANOUTPOS)     , nv50_disp_base_scanoutpos },

	{ SOR_MTHD(NV50_DISP_SOR_PWR)         , nv50_sor_mthd },

	{ SOR_MTHD(NV84_DISP_SOR_HDMI_PWR)    , nv50_sor_mthd },

	{ SOR_MTHD(NV50_DISP_SOR_LVDS_SCRIPT) , nv50_sor_mthd },

drivers/gpu/drm/nouveau/core/engine/disp/nv94.c

+1 −0
Original line number Diff line number Diff line
@@ -41,6 +41,7 @@ nv94_disp_sclass[] = { 


static struct nouveau_omthds

nv94_disp_base_omthds[] = {

	{ HEAD_MTHD(NV50_DISP_SCANOUTPOS)     , nv50_disp_base_scanoutpos },

	{ SOR_MTHD(NV50_DISP_SOR_PWR)         , nv50_sor_mthd },

	{ SOR_MTHD(NV84_DISP_SOR_HDMI_PWR)    , nv50_sor_mthd },

	{ SOR_MTHD(NV50_DISP_SOR_LVDS_SCRIPT) , nv50_sor_mthd },