Commit d206f661 authored Nov 27, 2014 by Fabio Estevam Committed by Mark Brown Nov 27, 2014

ASoC: mxs-sgtl5000: Remove MCLK restriction



According to the sgtl5000 datasheet the MCLK frequency range restriction of
8 to 27 MHz only applies when the PLL is used - synchronous SYS_MCLK input mode.

mxs-sgtl5000 machine sets the codec as slave, and mx28 generates MCLK in the
range of 256*fs, 384*fs or 512*fs, which is called asynchronous SYS_MCLK
input.

In asynchronous SYS_MCLK we cannot have the 8 to 27 MHz check because if we
want to play a 8KHz sample rate track, with a MCLK of 8k * 512 = 4.096MHz the
current check would return -EINVAL, which is not correct.

Remove the 8 to 27MHz frequency check, since this only applies to the
synchronous SYS_MCLK input case.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

parent f114040e

sound/soc/mxs/mxs-sgtl5000.c

+0 −7

Original line number	Diff line number	Diff line
		@@ -49,13 +49,6 @@ static int mxs_sgtl5000_hw_params(struct snd_pcm_substream *substream,
		break;
		}

		/* Sgtl5000 sysclk should be >= 8MHz and <= 27M */
		if (mclk < 8000000 \|\| mclk > 27000000) {
		dev_err(codec_dai->dev, "Invalid mclk frequency: %u.%03uMHz\n",
		mclk / 1000000, mclk / 1000 % 1000);
		return -EINVAL;
		}

		/* Set SGTL5000's SYSCLK (provided by SAIF MCLK) */
		ret = snd_soc_dai_set_sysclk(codec_dai, SGTL5000_SYSCLK, mclk, 0);
		if (ret) {