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Commit d1c8b0a7 authored by Sebastian Andrzej Siewior's avatar Sebastian Andrzej Siewior Committed by Herbert Xu
Browse files

crypto: padlock - Enable on x86_64 



Almost everything stays the same, we need just to use the extended registers
on the bit variant.

Signed-off-by: default avatarSebastian Andrzej Siewior <sebastian@breakpoint.cc>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 962a9c99

drivers/crypto/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -12,7 +12,7 @@ if CRYPTO_HW 


config CRYPTO_DEV_PADLOCK

	tristate "Support for VIA PadLock ACE"

	depends on X86_32 && !UML

	depends on !UML

	select CRYPTO_ALGAPI

	help

	  Some VIA processors come with an integrated crypto engine

drivers/crypto/padlock-aes.c

+13 −0
Original line number Diff line number Diff line
@@ -154,7 +154,11 @@ static inline void padlock_reset_key(struct cword *cword) 
	int cpu = raw_smp_processor_id();



	if (cword != per_cpu(last_cword, cpu))

#ifndef CONFIG_X86_64

		asm volatile ("pushfl; popfl");

#else

		asm volatile ("pushfq; popfq");

#endif

}



static inline void padlock_store_cword(struct cword *cword)
@@ -208,10 +212,19 @@ static inline void padlock_xcrypt_ecb(const u8 *input, u8 *output, void *key, 


	asm volatile ("test $1, %%cl;"

		      "je 1f;"

#ifndef CONFIG_X86_64

		      "lea -1(%%ecx), %%eax;"

		      "mov $1, %%ecx;"

#else

		      "lea -1(%%rcx), %%rax;"

		      "mov $1, %%rcx;"

#endif

		      ".byte 0xf3,0x0f,0xa7,0xc8;"	/* rep xcryptecb */

#ifndef CONFIG_X86_64

		      "mov %%eax, %%ecx;"

#else

		      "mov %%rax, %%rcx;"

#endif

		      "1:"

		      ".byte 0xf3,0x0f,0xa7,0xc8"	/* rep xcryptecb */

		      : "+S"(input), "+D"(output)