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Commit d1ba44a4 authored by Weijun Yang's avatar Weijun Yang Committed by Ulf Hansson
Browse files

mmc: sdhci-sirf: fix the tuning count in platform_execute_tuning 



hardware has 16bit to record the tuning count, so fix it to 16384.
at the same time, tuned_phases[SIRF_TUNING_COUNT] is useless as the
array is never used, so move it to a variant.

Signed-off-by: default avatarWeijun Yang <Weijun.Yang@csr.com>
Signed-off-by: default avatarBarry Song <Baohua.Song@csr.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent c4b13fb0

drivers/mmc/host/sdhci-sirf.c

+5 −4
Original line number Original line Diff line number Diff line
@@ -17,7 +17,7 @@ 




#define SDHCI_CLK_DELAY_SETTING 0x4C

#define SDHCI_CLK_DELAY_SETTING 0x4C

#define SDHCI_SIRF_8BITBUS BIT(3)

#define SDHCI_SIRF_8BITBUS BIT(3)

#define SIRF_TUNING_COUNT 128

#define SIRF_TUNING_COUNT 16384





struct sdhci_sirf_priv {

struct sdhci_sirf_priv {

	int gpio_cd;

	int gpio_cd;
@@ -46,7 +46,7 @@ static void sdhci_sirf_set_bus_width(struct sdhci_host *host, int width) 
static int sdhci_sirf_execute_tuning(struct sdhci_host *host, u32 opcode)

static int sdhci_sirf_execute_tuning(struct sdhci_host *host, u32 opcode)

{

{

	int tuning_seq_cnt = 3;

	int tuning_seq_cnt = 3;

	u8 phase, tuned_phases[SIRF_TUNING_COUNT];

	int phase;

	u8 tuned_phase_cnt = 0;

	u8 tuned_phase_cnt = 0;

	int rc = 0, longest_range = 0;

	int rc = 0, longest_range = 0;

	int start = -1, end = 0, tuning_value = -1, range = 0;

	int start = -1, end = 0, tuning_value = -1, range = 0;
@@ -58,6 +58,7 @@ static int sdhci_sirf_execute_tuning(struct sdhci_host *host, u32 opcode) 




retry:

retry:

	phase = 0;

	phase = 0;

	tuned_phase_cnt = 0;

	do {

	do {

		sdhci_writel(host,

		sdhci_writel(host,

			clock_setting | phase,

			clock_setting | phase,
@@ -65,7 +66,7 @@ static int sdhci_sirf_execute_tuning(struct sdhci_host *host, u32 opcode) 




		if (!mmc_send_tuning(mmc)) {

		if (!mmc_send_tuning(mmc)) {

			/* Tuning is successful at this tuning point */

			/* Tuning is successful at this tuning point */

			tuned_phases[tuned_phase_cnt++] = phase;

			tuned_phase_cnt++;

			dev_dbg(mmc_dev(mmc), "%s: Found good phase = %d\n",

			dev_dbg(mmc_dev(mmc), "%s: Found good phase = %d\n",

				 mmc_hostname(mmc), phase);

				 mmc_hostname(mmc), phase);

			if (start == -1)

			if (start == -1)
@@ -85,7 +86,7 @@ static int sdhci_sirf_execute_tuning(struct sdhci_host *host, u32 opcode) 
			start = -1;

			start = -1;

			end = range = 0;

			end = range = 0;

		}

		}

	} while (++phase < ARRAY_SIZE(tuned_phases));

	} while (++phase < SIRF_TUNING_COUNT);





	if (tuned_phase_cnt && tuning_value > 0) {

	if (tuned_phase_cnt && tuning_value > 0) {

		/*

		/*