Commit d1992996 authored Sep 02, 2016 by Emanuel Czirai Committed by Thomas Gleixner Sep 02, 2016

x86/AMD: Apply erratum 665 on machines without a BIOS fix



AMD F12h machines have an erratum which can cause DIV/IDIV to behave
unpredictably. The workaround is to set MSRC001_1029[31] but sometimes
there is no BIOS update containing that workaround so let's do it
ourselves unconditionally. It is simple enough.

[ Borislav: Wrote commit message. ]

Signed-off-by: Emanuel Czirai <icanrealizeum@gmail.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Yaowu Xu <yaowu@google.com>
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/20160902053550.18097-1-bp@alien8.de


Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

parent 3eab887a

arch/x86/kernel/cpu/amd.c

+12 −0

Original line number	Diff line number	Diff line
		@@ -669,6 +669,17 @@ static void init_amd_gh(struct cpuinfo_x86 *c)
		set_cpu_bug(c, X86_BUG_AMD_TLB_MMATCH);
		}

		#define MSR_AMD64_DE_CFG 0xC0011029

		static void init_amd_ln(struct cpuinfo_x86 *c)
		{
		/*
		* Apply erratum 665 fix unconditionally so machines without a BIOS
		* fix work.
		*/
		msr_set_bit(MSR_AMD64_DE_CFG, 31);
		}

		static void init_amd_bd(struct cpuinfo_x86 *c)
		{
		u64 value;
		@@ -726,6 +737,7 @@ static void init_amd(struct cpuinfo_x86 *c)
		case 6: init_amd_k7(c); break;
		case 0xf: init_amd_k8(c); break;
		case 0x10: init_amd_gh(c); break;
		case 0x12: init_amd_ln(c); break;
		case 0x15: init_amd_bd(c); break;
		}