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Commit d13733f4 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Mark Brown
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regulator: s5m8767: Do not use sec_reg* regmap helpers



Replace calls to sec_reg* helpers with direct usage of regmap API. The
sec_reg* helpers are error-prone as they mix u8 with unsigned int and
order of some of parameters (val and mask in sec_reg_update()).

Also the helpers do not give any way of useful abstraction as they just
call corresponding regmap function.

This patch replaces:
 - sec_reg_read() with regmap_read(),
 - sec_reg_write() with regmap_write(),
 - sec_reg_update() with regmap_update_bits().

Signed-off-by: default avatarKrzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: default avatarLee Jones <lee.jones@linaro.org>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent f37ff6b6
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+41 −30
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@
#include <linux/mfd/samsung/core.h>
#include <linux/mfd/samsung/s5m8767.h>
#include <linux/regulator/of_regulator.h>
#include <linux/regmap.h>

#define S5M8767_OPMODE_NORMAL_MODE 0x1

@@ -226,7 +227,7 @@ static int s5m8767_reg_is_enabled(struct regulator_dev *rdev)
	else if (ret)
		return ret;

	ret = sec_reg_read(s5m8767->iodev, reg, &val);
	ret = regmap_read(s5m8767->iodev->regmap_pmic, reg, &val);
	if (ret)
		return ret;

@@ -243,21 +244,21 @@ static int s5m8767_reg_enable(struct regulator_dev *rdev)
	if (ret)
		return ret;

	return sec_reg_update(s5m8767->iodev, reg, enable_ctrl,
			S5M8767_ENCTRL_MASK);
	return regmap_update_bits(s5m8767->iodev->regmap_pmic, reg,
			S5M8767_ENCTRL_MASK, enable_ctrl);
}

static int s5m8767_reg_disable(struct regulator_dev *rdev)
{
	struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
	int ret, reg;
	int mask = S5M8767_ENCTRL_MASK, enable_ctrl;
	int ret, reg, enable_ctrl;

	ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
	if (ret)
		return ret;

	return sec_reg_update(s5m8767->iodev, reg, ~mask, mask);
	return regmap_update_bits(s5m8767->iodev->regmap_pmic, reg,
			S5M8767_ENCTRL_MASK, ~S5M8767_ENCTRL_MASK);
}

static int s5m8767_get_vsel_reg(int reg_id, struct s5m8767_info *s5m8767)
@@ -749,17 +750,20 @@ static int s5m8767_pmic_probe(struct platform_device *pdev)
	buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
						   pdata->buck2_init);

	sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS2, buck_init);
	regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK2DVS2,
			buck_init);

	buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
						   pdata->buck3_init);

	sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS2, buck_init);
	regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK3DVS2,
			buck_init);

	buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
						   pdata->buck4_init);

	sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS2, buck_init);
	regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK4DVS2,
			buck_init);

	for (i = 0; i < 8; i++) {
		if (s5m8767->buck2_gpiodvs) {
@@ -841,43 +845,49 @@ static int s5m8767_pmic_probe(struct platform_device *pdev)

	if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
	   pdata->buck4_gpiodvs) {
		sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL,
				(pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1),
				1 << 1);
		sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL,
				(pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1),
				1 << 1);
		sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL,
				(pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1),
				1 << 1);
		regmap_update_bits(s5m8767->iodev->regmap_pmic,
				S5M8767_REG_BUCK2CTRL, 1 << 1,
				(pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1));
		regmap_update_bits(s5m8767->iodev->regmap_pmic,
				S5M8767_REG_BUCK3CTRL, 1 << 1,
				(pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1));
		regmap_update_bits(s5m8767->iodev->regmap_pmic,
				S5M8767_REG_BUCK4CTRL, 1 << 1,
				(pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1));
	}

	/* Initialize GPIO DVS registers */
	for (i = 0; i < 8; i++) {
		if (s5m8767->buck2_gpiodvs) {
			sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS1 + i,
			regmap_write(s5m8767->iodev->regmap_pmic,
					S5M8767_REG_BUCK2DVS1 + i,
					s5m8767->buck2_vol[i]);
		}

		if (s5m8767->buck3_gpiodvs) {
			sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS1 + i,
			regmap_write(s5m8767->iodev->regmap_pmic,
					S5M8767_REG_BUCK3DVS1 + i,
					s5m8767->buck3_vol[i]);
		}

		if (s5m8767->buck4_gpiodvs) {
			sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS1 + i,
			regmap_write(s5m8767->iodev->regmap_pmic,
					S5M8767_REG_BUCK4DVS1 + i,
					s5m8767->buck4_vol[i]);
		}
	}

	if (s5m8767->buck2_ramp)
		sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x08, 0x08);
		regmap_update_bits(s5m8767->iodev->regmap_pmic,
				S5M8767_REG_DVSRAMP, 0x08, 0x08);

	if (s5m8767->buck3_ramp)
		sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x04, 0x04);
		regmap_update_bits(s5m8767->iodev->regmap_pmic,
				S5M8767_REG_DVSRAMP, 0x04, 0x04);

	if (s5m8767->buck4_ramp)
		sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x02, 0x02);
		regmap_update_bits(s5m8767->iodev->regmap_pmic,
				S5M8767_REG_DVSRAMP, 0x02, 0x02);

	if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
		|| s5m8767->buck4_ramp) {
@@ -901,9 +911,10 @@ static int s5m8767_pmic_probe(struct platform_device *pdev)
		default:
			val = S5M8767_DVS_BUCK_RAMP_10;
		}
		sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
					val << S5M8767_DVS_BUCK_RAMP_SHIFT,
					S5M8767_DVS_BUCK_RAMP_MASK);
		regmap_update_bits(s5m8767->iodev->regmap_pmic,
					S5M8767_REG_DVSRAMP,
					S5M8767_DVS_BUCK_RAMP_MASK,
					val << S5M8767_DVS_BUCK_RAMP_SHIFT);
	}

	for (i = 0; i < pdata->num_regulators; i++) {