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Commit d1244336 authored by Will Deacon's avatar Will Deacon
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ARM: hw_breakpoint: reduce the number of WARN_ONCE invocations 



The ARM hw_breakpoint backend is currently a bit too noisy when things
start to go awry.

This patch removes a couple of over-zealous WARN_ONCE invocations and
replaces then with pr_warnings instead.

Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 0d352e3d

arch/arm/kernel/hw_breakpoint.c

+8 −8
Original line number Diff line number Diff line
@@ -136,10 +136,11 @@ static u8 get_debug_arch(void) 
	u32 didr;



	/* Do we implement the extended CPUID interface? */

	if (WARN_ONCE((((read_cpuid_id() >> 16) & 0xf) != 0xf),

	    "CPUID feature registers not supported. "

	    "Assuming v6 debug is present.\n"))

	if (((read_cpuid_id() >> 16) & 0xf) != 0xf) {

		pr_warning("CPUID feature registers not supported. "

			   "Assuming v6 debug is present.\n");

		return ARM_DEBUG_ARCH_V6;

	}



	ARM_DBG_READ(c0, 0, didr);

	return (didr >> 16) & 0xf;
@@ -626,10 +627,9 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp) 
	 * we can use the mismatch feature as a poor-man's hardware

	 * single-step, but this only works for per-task breakpoints.

	 */

	if (WARN_ONCE(!bp->overflow_handler &&

		(arch_check_bp_in_kernelspace(bp) || !core_has_mismatch_brps()

		 || !bp->hw.bp_target),

			"overflow handler required but none found\n")) {

	if (!bp->overflow_handler && (arch_check_bp_in_kernelspace(bp) ||

	    !core_has_mismatch_brps() || !bp->hw.bp_target)) {

		pr_warning("overflow handler required but none found\n");

		ret = -EINVAL;

	}

out: