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Commit d0efa8f2 authored by Tushar Dave's avatar Tushar Dave Committed by Jeff Kirsher
Browse files

e1000e: Correct link check logic for 82571 serdes 



SYNCH bit and IV bit of RXCW register are sticky. Before examining these bits,
RXCW should be read twice to filter out one-time false events and have correct
values for these bits. Incorrect values of these bits in link check logic can
cause weird link stability issues if auto-negotiation fails.

CC: stable <stable@vger.kernel.org> [2.6.38+]
Reported-by: default avatarDean Nelson <dnelson@redhat.com>
Signed-off-by: default avatarTushar Dave <tushar.n.dave@intel.com>
Reviewed-by: default avatarBruce Allan <bruce.w.allan@intel.com>
Tested-by: default avatarJeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 7ac2908e

drivers/net/ethernet/intel/e1000e/82571.c

+3 −0
Original line number Diff line number Diff line
@@ -1572,6 +1572,9 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) 
	ctrl = er32(CTRL);

	status = er32(STATUS);

	rxcw = er32(RXCW);

	/* SYNCH bit and IV bit are sticky */

	udelay(10);

	rxcw = er32(RXCW);



	if ((rxcw & E1000_RXCW_SYNCH) && !(rxcw & E1000_RXCW_IV)) {