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Commit cea65dbd authored by Archit Taneja's avatar Archit Taneja Committed by Rob Clark
Browse files

drm/msm/dsi: Add dsi_cfg for APQ8064 



Add a dsi_cfg entry for APQ8064. Since this is the first DSIv2 chip to
be supported, add a list of bus clocks that are required by the DSIv2
block.

Signed-off-by: default avatarArchit Taneja <architt@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent 4bfa9748

drivers/gpu/drm/msm/dsi/dsi_cfg.c

+16 −3
Original line number Diff line number Diff line
@@ -13,9 +13,22 @@ 


#include "dsi_cfg.h"



/* DSI v2 has not been supported by now */

static const struct msm_dsi_config dsi_v2_cfg = {

static const char * const dsi_v2_bus_clk_names[] = {

	"core_mmss_clk", "iface_clk", "bus_clk",

};



static const struct msm_dsi_config apq8064_dsi_cfg = {

	.io_offset = 0,

	.reg_cfg = {

		.num = 3,

		.regs = {

			{"vdda", 1200000, 1200000, 100000, 100},

			{"avdd", 3000000, 3000000, 110000, 100},

			{"vddio", 1800000, 1800000, 100000, 100},

		},

	},

	.bus_clk_names = dsi_v2_bus_clk_names,

	.num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names),

};



static const char * const dsi_6g_bus_clk_names[] = {
@@ -75,7 +88,7 @@ static const struct msm_dsi_config msm8994_dsi_cfg = { 
};



static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {

	{MSM_DSI_VER_MAJOR_V2, U32_MAX, &dsi_v2_cfg},

	{MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, &apq8064_dsi_cfg},

	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,

						&msm8974_apq8084_dsi_cfg},

	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1,

drivers/gpu/drm/msm/dsi/dsi_cfg.h

+2 −0
Original line number Diff line number Diff line
@@ -25,6 +25,8 @@ 
#define MSM_DSI_6G_VER_MINOR_V1_3	0x10030000

#define MSM_DSI_6G_VER_MINOR_V1_3_1	0x10030001



#define MSM_DSI_V2_VER_MINOR_8064	0x0



#define DSI_6G_REG_SHIFT	4



struct msm_dsi_config {